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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| MBE | 2006-05-26 11:20 |
Toyama | Toyama Univ. | Embedded microprocessor system for the transtibial active prosthesis control Youichi Shimada, Yukio Terayama (KIT) |
This report represents the development of transtibial active prosthesis controlled by the microprocessor. This prosthesi... [more] | MBE2006-5 pp.17-20 |
| EE, IEE-IEA | 2006-05-19 13:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Low-Ripple-Voltage and High-Speed Control System With MEMS Technology for Regulating Load of Switching Regulators Masashi Kono, Zhang Ting, Liu Aiyan, Keigo Kimura, Haruo Kobayashi, Yasunori Kobori (Gunma Univ.)  EE2006-6 |
This paper presents new approarches to creating high-performance control systems for DC-DC converters (switching regulat... [more] | EE2006-6 pp.31-36 |
| VLD, IPSJ-SLDM | 2006-05-11 15:00 |
Ehime | Ehime University | A Software-level Energy Reduction Technique for Embedded Microprocessor Exploiting Narrow Bitwidth Operations Seiichiro Yamaguchi, Masanori Muroyama, Tohru Ishihara, Hiroto Yasuura (Kyushu Univ.) |
This paper proposes a software-level energy reduction technique for microprocessor-based embedded systems. A basic idea ... [more] | VLD2006-3 pp.13-18 |
| VLD, IPSJ-SLDM | 2006-05-12 11:15 |
Ehime | Ehime University | Power-Conscious Microprocessor-Based Testing of System-on-Chip Fawnizu Azmadi Hussin, Tomokazu Yoneda (NAIST), Alex Orailoglu (Univ. of California), Hideo Fujiwara (NAIST) |
In this paper, we are proposing a core-based test methodology that utilizes the functional bus for test stimuli and resp... [more] | VLD2006-10 pp.25-30 |
| SIP, ICD, IE, IPSJ-SLDM | 2005-10-21 10:30 |
Miyagi | Ichinobo, Sakunami-Spa | Single-Chip Multi-Processor Integrating Quadruple 8-Way VLIW Processors Atsushi Tanaka, Atsuhiro Suga, Fumihiko Hayakawa, Shinichiro Tago, Satoshi Imai (Fujitsu Lab) |
To realize the low power consumption and low-cost equipment needed to encode high-definition broadcasts, we have develo... [more] | SIP2005-119 ICD2005-138 IE2005-83 pp.25-29 |
| CPSY, VLD, IPSJ-SLDM | 2005-01-26 13:40 |
Kanagawa | Design and Development of Microprocessors on a Hardware/Software Colearning System Koichiro Nakamura, Hoang Anh Tuan, Shigeru Oyanagi, Katsuhiro Yamazaki (Ritsumeikan University) |
The hardware/software co-learning system helps user to learn both hardware and software such as assembly programming, pr... [more] | VLD2004-116 CPSY2004-82 pp.37-42 |
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| CAS | 2005-01-21 15:30 |
Ishikawa | Kanazawa Univ | High-Level Synthesis from Executable Code Hidenori Ogata, Akio Kitagawa (Kanazawa Univ.) |
In this work, we present a technique for automatically generating a synthesizable HDL code from an executable code. The ... [more] | CAS2004-78 pp.35-40 |
| CPSY | 2004-12-20 16:05 |
Tokyo | Ochanomizu University | Towards Zero-Performance-Loss Microarchitecture for Transient Faults Tolerance Toshinori Sato (Kyushu Inst. Tech.) |
This paper presents an approach for integrating fault-tolerance techniques into microprocessors. Smaller and smaller tra... [more] | CPSY2004-60 pp.73-78 |
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