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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD | 2018-04-19 10:35 |
Tokyo | Application-optimized heterogeneously-integrated storage with non-volatile memories Chihiro Matsui, Ken Takeuchi (Chuo Univ.)  ICD2018-2 |
Data center storages require application-optimized heterogeneous integration of non-volatile memories. Two types of stor... [more] | ICD2018-2 pp.7-10 |
|
| MBE, NC (Joint) |
2018-03-13 10:25 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Statistical mechanics of coherent Ising machine
-- The case of infinite loading Hopfield model -- Toru Aonishi (Tokyo Tech.), Kazushi Mimura (Hiroshima City Univ.), Masato Okada (Univ. Tokyo), Yoshihisa Yamamoto (ImPACT/ Stanford Univ.) NC2017-69 |
The coherent Ising machine (CIM) has attracted attention as one of the most effective Ising computing architectures for ... [more] | NC2017-69 pp.9-14 |
| MBE, NC (Joint) |
2018-03-13 10:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Statistical mechanics of coherent Ising machine
-- The analysis of Hopfield model with discrete synapses -- Shunki Nakagawa, Toru Aonishi (Tokyo Tech.), Kazushi Mimura (Hiroshima City Univ.), Masato Okada (Univ. Tokyo), Yoshihisa Yamamoto (ImPACT/ Stanford Univ.) NC2017-70 |
The coherent Ising machine (CIM) is being developed as one of the Ising computing architecture for solving large-scale c... [more] | NC2017-70 pp.15-20 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2018-03-07 16:35 |
Shimane | Okinoshima Bunka-Kaikan Bldg. | A System for Analyzing Memory Snapshot with NVDIMM Masahito Misu, Shinobu Miwa, Hayato Yamaki, Hiroki Honda (UEC) CPSY2017-137 DC2017-93 |
Non-Volatile DIMM (NVDIMM), which has the speed comparable to DRAM DIMM, is lately available and being introduced into v... [more] | CPSY2017-137 DC2017-93 pp.107-112 |
| MRIS, ITE-MMS | 2017-10-19 13:45 |
Niigata | Kashiwazaki energy hall, Niigata | [Invited Talk]
Analog spintronics devices and its application to artificial neural networks Hisanao Akima, William Borders, Shunsuke Fukami, Satoshi Moriya, Shouta Kurihara, Aleksandr Kurenkov, Yoshihiko Horio, Shigeo Sato, Hideo Ohno (Tohoku Univ.) MR2017-18 |
Developing dedicated integrated circuits operating with low power consumption is indispensable to realize a large scale ... [more] | MR2017-18 pp.7-12 |
| MBE, NC (Joint) |
2017-10-07 10:55 |
Osaka | Osaka Electro-Communication University | Robust memory capacity in echo state networks with a small-world topology Yuji Kawai, Jihoon Park, Minoru Asada (Osaka Univ.) NC2017-20 |
A small-world (SW) topology was found in the cortical neural connectivity. However, the role of the topology in neural i... [more] | NC2017-20 pp.1-6 |
| HIP | 2017-03-10 12:20 |
Osaka | CiNet | A review of capacity limitation from visual perception to short-term visual memory for a single curved figure Koji Sakai (Kyoto Koka Women's Univ.) HIP2016-87 |
This study reviews capacity limitation in a processing from visual perception to short-term visual memory for a single c... [more] | HIP2016-87 pp.73-78 |
| IE, ITS, ITE-AIT, ITE-HI, ITE-ME, ITE-MMS, ITE-CE [detail] | 2017-02-20 13:30 |
Hokkaido | Hokkaido Univ. | Characterization of multiplexing technique using virtual phase conjugation for high density holographic memory Yuta Goto, Atsushi Okamoto, Kazuhisa Ogawa, Akihisa Tomita (Hokkaido Univ.) |
In the holographic memory, the achievable multiplexing number of holograms and the recording density are inherently rest... [more] | |
| MSS, SS | 2017-01-26 11:30 |
Kyoto | Kyoto Institute of Technology | Multitask Scheduling Method for Reducing Total Memory Usage by Predicting Behavior of Heap Memory Allocations Hiroki Nakayama, Akio Nakata (Hiroshima City Univ) MSS2016-60 SS2016-39 |
The multitask scheduling method for reducing total memory usage that compares the next step increments of the memory usa... [more] | MSS2016-60 SS2016-39 pp.19-24 |
| ICD, CPSY | 2016-12-15 15:30 |
Tokyo | Tokyo Institute of Technology | [Poster Presentation]
Error Pattern Analysis among Scaled Generations of NAND Flash Memories Yukiya Sakaki, Yusuke Yamaga, Ken Takeuchi (Chuo Univ.) ICD2016-69 CPSY2016-75 |
The capacity of NAND flash memory can be expanded by memory cell scaling. However, bit-errors are increased by memory ce... [more] | ICD2016-69 CPSY2016-75 p.57 |
| ICD, CPSY | 2016-12-15 15:30 |
Tokyo | Tokyo Institute of Technology | [Poster Presentation]
A Highly Reliable Method with Data-Retenrion Characteristics in TLC NAND Flash Memories Toshiki Nakamura, Yoshiaki Deguchi, Ken Takeuchi (Chuo Univ.) ICD2016-73 CPSY2016-79 |
The capacity of NAND flash memory can be expanded by multi-level cell technology. In particular, 3-bit/cell triple-level... [more] | ICD2016-73 CPSY2016-79 p.65 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 09:25 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Optimal configuration design of SCM and MLC/TLC NAND flash memory in semiconductor storage system Chihiro Matsui, Yusuke Yamaga, Yusuke Sugiyama, Ken Takeuchi (Chuo Univ.) CPM2016-77 ICD2016-38 IE2016-72 |
In order to manage wide variety of data at high speed, a tri-hybrid storage system has been proposed with using storage ... [more] | CPM2016-77 ICD2016-38 IE2016-72 pp.7-10 |
| SCE | 2016-04-20 14:40 |
Tokyo | On-chip Implementation of Random-Access-Memory and RSFQ Microprocessor with High-Functionality Ryo Sato (Nagoya Univ.), Yuki Ando (Kyoto Univ.), Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.), Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) SCE2016-5 |
The single flux quantum (SFQ) microprocessor demonstrated so far was not able to run meaningful programs due to the limi... [more] | SCE2016-5 pp.25-30 |
|
| TL | 2016-01-30 11:00 |
Tokyo | Meiji University (Academy Common) | The effect of syntactic processing demands on the text comprehension of Japanese EFL learners
-- Evidence from a lexical decision task -- Keiko Sakakibara, Hirokazu Yokokawa (Kobe Univ.) TL2015-61 |
Successful text comprehension requires the coordinated operation of several component processes. As various cognitive pr... [more] | TL2015-61 pp.35-40 |
| MBE, NC (Joint) |
2015-12-19 14:50 |
Aichi | Nagoya Institute of Technology | An Associative Memory Model with Forgetting Process by Eliminating Weak Synapses Takuya Akamine, Koji Kurata (Univ Ryukyu) NC2015-50 |
In associative memory models overloading beyond the memory capacity causes catastrophic forgetting. In order to avoid it... [more] | NC2015-50 pp.25-30 |
| ICD, CPSY | 2015-12-17 16:00 |
Kyoto | Kyoto Institute of Technology | [Poster Presentation]
Bit-Error Analysis in TLC NAND flash memories. Yoshiaki Deguchi, Tsukasa Tokutomi, Atsuro Kobayashi, Ken Takeuchi (Chuo Univ.) ICD2015-75 CPSY2015-88 |
The capacity of NAND flash memory can be expanded by increasing the bit density. In particular, 3-bit/cell triple-level ... [more] | ICD2015-75 CPSY2015-88 p.49 |
| CPM | 2015-10-14 15:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | High-Speed Reference Beam Angle Control Technique for Holographic Memory System Naohito Ikeda, Taku Hoshizawa, Yusuke Nakamura (Hitachi), Tatsuya Ishitobi, Koichiro Nishimura (HLDS) CPM2015-80 |
We have been researching holographic data storage system (HDSS) employing angularly multiplexing recording which is capa... [more] | CPM2015-80 pp.17-20 |
| EMM, IT | 2015-05-21 10:40 |
Kyoto | Kyoto International Community House | Feasible regions of symmetric capacity and Gallager's $E_{0}$ functions for discrete memoryless channels under a uniform input distribution Yuta Sakai, Ken-ichi Iwata (Univ. of Fukui) IT2015-2 EMM2015-2 |
This study aims to clarify the extremal channels in the sense of channel reliability functions for some class of channel... [more] | IT2015-2 EMM2015-2 pp.7-12 |
| IT | 2015-01-30 13:25 |
Chiba | Range of Symmetric Capacity and Reliability Functions for Ternary-Input Discrete Memoryless Channels with Uniform Input Distribution Yuta Sakai, Ken-ichi Iwata (Univ. of Fukui) IT2014-55 |
F`{a}bregas, Land, Martinez revealed that binary symmetric channels and binary erasure channels are extremal channels in... [more] | IT2014-55 pp.7-12 |
|
| IA | 2014-11-27 13:00 |
Tottori | Green-Squalle Sekigane (Tottori) | The High Reliability Network Equipment utilizing non-Volatile Data Tomoyuki Oku (Hitachi), Yoshifumi Atarashi (ALAXALA Networks) IA2014-67 |
Event log information stored in communication equipment (CE) is useful for fault analysis. However, a number of event lo... [more] | IA2014-67 pp.31-36 |
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