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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, CPSY, CAS | 2017-12-15 09:50 |
Okinawa | Art Hotel Ishigakijima | A 60GHz Integrated Antenna Switch for TDD Transceivers in 65nm CMOS Korkut Kaan Tokgoz, Seitaro Kawai, Kenichi Okada, Akira Matsuzawa (Tokyo Tech.)  CAS2017-102 ICD2017-90 CPSY2017-99 |
In this work, an integrated antenna switching architecture is presented for time-division-duplex millimeter-wave transce... [more] | CAS2017-102 ICD2017-90 CPSY2017-99 pp.151-153 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-08 14:25 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | Pixel-Wise Exposure Controllable Column Parallel Readout Image Sensor and HDR Image Reconstruction Takuro Kosaka, Takayuki Hamamoto (TUS) CPM2017-90 ICD2017-49 IE2017-75 |
In this paper, we propose a prototype CMOS image sensor which can control exposure pattern of each pixel. By adding colu... [more] | CPM2017-90 ICD2017-49 IE2017-75 pp.53-56 |
| SDM | 2017-10-26 14:00 |
Miyagi | Niche, Tohoku Univ. | Analysis of Random Telegraph Noise Behaviors toward Changes of Source Follower Transistor Operation Conditions using High Accuracy Array Test Circuit Shinya Ichino, Takezo Mawaki, Akinobu Teramoto, Rihito Kuroda, Shunichi Wakashima, Shigetoshi Sugawa (Tohoku Univ.) SDM2017-60 |
Behaviors of random telegraph noise (RTN) occurs at CMOS image sensors’ in-pixel source follower transistors (SF) toward... [more] | SDM2017-60 pp.57-62 |
| ICD | 2017-04-21 09:35 |
Tokyo | [Invited Lecture]
Architectures and energy performance of nonvolatile SRAM for core-level nonvolatile power-gating Daiki Kitagata, Yusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara (Tokyo Inst. of Tech.) ICD2017-10 |
Architectures and energy performance of nonvolatile SRAM (NV-SRAM) are demonstrated for nonvolatile power-gating (NVPG) ... [more] | ICD2017-10 pp.51-56 |
|
| OME, SDM | 2017-04-20 16:45 |
Kagoshima | Tatsugochou Shougaigakushuu Center | A Study on Top-Gate Type OFETs utilizing Amorphous Rubrene Gate Insulator Shun-ichiro Ohmi, Mizuha Hiroki, Hongli Zhang, Yasutaka Maeda (Tokyo Tech) SDM2017-4 OME2017-4 |
High hole mobility, higher than that of amorphous-Si (a-Si), has been reported for the organic semiconductor field-effec... [more] | SDM2017-4 OME2017-4 pp.15-18 |
| VLD | 2017-03-03 10:30 |
Okinawa | Okinawa Seinen Kaikan | A design method of nMOS dynamic shift registers for driver circuit of small liquid crystal display Youngtai Kang, Shuji Tsukiyama, Shinji Higa (Chuo Univ.) VLD2016-125 |
Driver circuits for small LCD (Liquid Crystal Display) are formed on the same glass substrate as LCD by means of TFTs (T... [more] | VLD2016-125 pp.127-132 |
| SDM | 2017-02-06 13:35 |
Tokyo | Tokyo Univ. | [Invited Talk]
Electrical coupling of stacked transistors in monolithic three-dimensional inverters and its dependence on the interlayer dielectric thickness Junichi Hattori, Koichi Fukuda, Toshifumi Irisawa, Hiroyuki Ota, Tatsuro Maeda (AIST) SDM2016-143 |
We study the electrical coupling of stacked transistors in monolithic three-dimensional (3D) inverters and investigate i... [more] | SDM2016-143 pp.23-28 |
| ICD, CPSY | 2016-12-16 09:40 |
Tokyo | Tokyo Institute of Technology | Automatic Design of Bias Circuit Based on the Results of Characterized MOSFET Kento Suzuki, Nobukazu Takai, Yoshiki Sugawara, Kazuto Okochi, Satoshi Yoshizawa, Tsukasa Ishii, Saki Shinoda, Masafumi Fukuda (Gunma Univ.) ICD2016-91 CPSY2016-97 |
It is difficult to design optimal analog circuit in a short time in terms of designing flexibility. In an analog circuit... [more] | ICD2016-91 CPSY2016-97 pp.119-122 |
| SDM | 2016-06-29 10:40 |
Tokyo | Campus Innovation Center Tokyo | [Invited Lecture]
Design of SOI-FETs for Steep Slope Switching using Negative Capacitance in Ferroelectric Gate Insulators Hiroyuki Ota, Shinji Migita, Junichi Hattori, Koichi Fukuda (AIST), Akira Toriumi (The Univ. of Tokyo) SDM2016-34 |
This paper discusses a design of fully depleted silicon-on-insulator field-effect transistors with ferroelectric gate in... [more] | SDM2016-34 pp.9-13 |
| SDM | 2016-06-29 16:40 |
Tokyo | Campus Innovation Center Tokyo | MoS2 film formation by RF magnetron sputtering for thin film transistors Takumi Ohashi, Kentaro Matsuura (Tokyo Tech), Seiya Ishihara, Yusuke Hibino, Naomi Sawamoto (Meiji Univ.), Kuniyuki Kakushima, Kazuo Tsutsui (Tokyo Tech), Atsushi Ogura (Meiji Univ.), Hitoshi Wakabayashi (Tokyo Tech) SDM2016-46 |
Multi-layered MoS2 has been expected as a new candidate for complementary TFT material owing to its promising characteri... [more] | SDM2016-46 pp.75-78 |
| MW (2nd) |
2016-06-09 - 2016-06-11 |
Overseas | KMUTNB, Bangkok, Thailand | Design of CMOS Vector Sum Phase Shifter Shungo Ishii, Takana Kaho, Ramesh Pokharel (Kyushu Univ.) |
A 3.6-4.2 GHz CMOS phase shifter which employed a vector sum structure is designed. It consists of an active balun, OTA ... [more] | |
| SDM, OME | 2016-04-08 12:00 |
Okinawa | Okinawa Prefectural Museum & Art Museum | [Invited Talk]
OFET Device Characteristics utilizing Low Work-function Metal Interface Control Layer Shun-ichiro Ohmi, Yasutaka Maeda, Syu Furuyama, Mizuha Hiroki (Tokyo Tech) SDM2016-3 OME2016-3 |
High hole mobility, higher than that of a-Si, has been reported for the organic semiconductor field-effect transistor (O... [more] | SDM2016-3 OME2016-3 pp.11-15 |
| ED | 2016-01-20 11:20 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
State-of-the-art technology of gallium oxide power devices Masataka Higashiwaki, Man Hoi Wong, Keita Konishi (NICT), Kohei Sasaki (Tamura/NICT), Ken Goto (Tamura/TAT), Kazushiro Nomura, Quang Tu Thieu, Rie Togashi, Hisashi Murakami, Yoshinao Kumagai, Bo Monemar, Akinori Koukitu (TAT), Akito Kuramata, Takekazu Masui, Shigenobu Yamakoshi (Tamura) ED2015-114 |
Gallium oxide (Ga{$_{2}$}O{$_{3}$}) is one of oxide semiconductors and has excellent material properties for power devic... [more] | ED2015-114 pp.13-18 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 17:10 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | The adaptive body bias generator for achieving the ultra-low power operation of the logic circuit Tomoaki Koide, Kouichirou Ishibashi (UEC), Nobuyuki Sugi (LEAP) CPM2015-134 ICD2015-59 |
The leakage has been increasing by miniaturization of the transistor in recently year. Adaptive body bias generator with... [more] | CPM2015-134 ICD2015-59 pp.39-43 |
| SDM | 2015-06-19 13:40 |
Aichi | VBL, Nagoya Univ. | Fabrication of PtGe/Ge contacts with low hole barrier and its application to metal source/drain Ge p-channel MOSFETs Yuta Nagatomi, Shintaro Tanaka, Yuichi Nagaoka, Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima (Kyushu Univ.) SDM2015-47 |
The fabrication of PtGe/Ge contacts with low hole barrier height (ΦBP) and its electrical passivation were investigated.... [more] | SDM2015-47 pp.47-50 |
| SDM | 2015-06-19 16:10 |
Aichi | VBL, Nagoya Univ. | Improvements of electrical properties of wafer-bonded GeOI substrates with ultrathin Al2O3/SiO2 hybrid BOX layers by post-annealing Keisuke Yoshida, Shotaro Takeuchi, Yoshiaki Nakamura, Akira Sakai (Osaka Univ.) SDM2015-53 |
The electrical properties of wafer-bonded germanium (001)-on-insulator (Ge (001)-OI) substrates with Al2O3/SiO2 hybrid b... [more] | SDM2015-53 pp.81-86 |
| OME, SDM | 2015-04-30 13:00 |
Okinawa | Oh-hama Nobumoto Memorial Hall | Grain Growth Control by Atmospheric Pressure Micro-Thermal-Plasma-Jet Irradiation on Amorphous Silicon Strips and High-Speed Operation of CMOS Circuit Seiji Morisaki, Shohei Hayashi, Shogo Yamamoto, Taichi Nakatani, Seiichiro Higashi (Hiroshima Univ.) SDM2015-13 OME2015-13 |
The formation or random grain boundaries was successfully suppressed using grain growth control of high-speed lateral cr... [more] | SDM2015-13 OME2015-13 pp.49-52 |
| RECONF, CPSY, VLD, IPSJ-SLDM [detail] | 2015-01-29 17:00 |
Kanagawa | Hiyoshi Campus, Keio University | Temperature sensor applying Body Bias in Silicon-on-Thin-BOX Tsubasa Kosaka, Shohei Nakamura, Kimiyoshi Usami (S.I.T.) VLD2014-127 CPSY2014-136 RECONF2014-60 |
The performance advancement by the transistor scaling is blocked by increase of power consumption and process variation.... [more] | VLD2014-127 CPSY2014-136 RECONF2014-60 pp.99-104 |
| MRIS, ITE-MMS, ITE-CE [detail] | 2015-01-23 15:45 |
Osaka | Room Temperature Operation of Silicon Spin-MOSFET Takayuki Tahara (Kyoto Univ.), Tomoyuki Sasaki (TDK), Yuichiro Ando (Kyoto Univ.), Makoto Kameno (Osaka Univ.), Hayato Koike, Ryo Oikawa (TDK), Toshio Suzuki (AIT), Masashi Shiraishi (Kyoto Univ.) MR2014-43 |
A technology for CMOS transistors has been developing for many years by establishing nano-lithography and high density i... [more] | MR2014-43 pp.19-24 |
|
| SDM, EID | 2014-12-12 15:15 |
Kyoto | Kyoto University | Characterization of the touch panel circuit using ITZO TFTs Yuki Koga, Tokiyoshi Matsuda (Ryukoku Univ.), Mamoru Furuta (Kochi Univ. of Technol.), Mutsumi Kimura (Ryukoku Univ.) EID2014-30 SDM2014-125 |
Oxide TFTs using ITZO for the active layer (ITZO TFTs) have attracted attention as a driving element of flatpanel displ... [more] | EID2014-30 SDM2014-125 pp.89-93 |
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