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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
RECONF, VLD |
2024-01-29 17:00 |
Kanagawa |
AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
Derivation of an Evaluation Chip Spec suitable for Tester and Data Analysis
-- Toward comparative evaluation of latch-based and flip-flop-based circuits -- Tadaaki Tanimoto, Keizo Hiraga, Toshihiko Katou, Kazuhiro Bessho, Toshimasa Shimizu (Sony Semiconductor Solutions) VLD2023-90 RECONF2023-93 |
As a synchronous logic circuit, it is often argued that latch-based circuits are superior to flip-flop circuits in terms... [more] |
VLD2023-90 RECONF2023-93 pp.59-64 |
VLD, CAS, MSS, SIP |
2016-06-17 15:50 |
Aomori |
Hirosaki Shiritsu Kanko-kan |
A Study on Fault Tolerant Features of Asynchronous Circuits using Voted-enable Latches Masashi Imai (Hirosaki Univ.), Tomohiro Yoneda (NII) CAS2016-33 VLD2016-39 SIP2016-67 MSS2016-33 |
A bit flip caused by voltage fluctuation, soft errors, and hardware Trojans becomes one of serious issues in the modern ... [more] |
CAS2016-33 VLD2016-39 SIP2016-67 MSS2016-33 pp.179-184 |
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