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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| CS, CQ (Joint) |
2017-04-20 13:00 |
Hokkaido | Chitose Institute of Science and Technology | Performance Evaluation of QoS Scheduling Architecture by the Coordination of Hardware and Software Atsushi Kitada, Kazuto Nishimura, Hiroshi Tomonaga (Fujitsu Lab.)  CS2017-1 |
Recent improvements of CPU performance and multi-core/multi-thread processing are driving forward the network softwariza... [more] | CS2017-1 pp.1-6 |
| SIS, IPSJ-AVM | 2016-09-01 14:35 |
Osaka | Osaka Electro-Communication Univ. | [Tutorial Lecture]
Implementation to FPGA of Image processing filter Tomoaki Kimura (Kanagawa Institute of Tech.) SIS2016-20 |
Video signal which is Full-HD, 4K UHD and 8K UHD is very high speed signal, the image processing filter is used for the ... [more] | SIS2016-20 pp.21-26 |
| CPSY, DC, IPSJ-ARC [detail] | 2016-05-09 16:00 |
Toyama | Unaduki Suginoi Hotel | On Building High Performance Data Structures by Multiple Synchronization Techniques Hikaru Nagai, Jun Miyazaki (Tokyo Tech) CPSY2016-5 DC2016-5 |
This paper shows the relationships between the features of individual fundamental concurrent data structures with severa... [more] | CPSY2016-5 DC2016-5 pp.27-32 |
| ICD, MW | 2016-03-02 14:05 |
Hiroshima | Hiroshima University | An Implementation of Hardware Sorting Algorithms using the FPGA Naoyuki Matsumoto, Xin Zhou, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) MW2015-180 ICD2015-103 |
The main contribution of this paper is to design $K$-sorter which sorts $K$ keys given from the input port one by one in... [more] | MW2015-180 ICD2015-103 pp.37-42 |
| AP (2nd) |
2016-02-29 17:00 |
Overseas | Telecommunications University, Nha Trang, Vietnam | An ASIC Implementation of Hardware Logarithm Generator for Digital Signal Processing in Communication Systems Van-Thuan Sai, Van-Phuc Hoang (LQDTU) |
In this paper, we present an efficient hardware approximation for the binary logarithm function which is highly required... [more] | |
| SANE | 2015-11-23 10:30 |
Overseas | AIT, Bangkok, Thailand | Development of a Software System for Attitude Determination and Control System Simulator Hoang The Huynh, Nguyen Dinh Quan, Bui Tien Thanh, Nguyen Minh Thao, Le Xuan Huy, Vu Viet Phuong, Pham Anh Tuan (VAST) SANE2015-50 |
Attitude determination and control system (ADCS) is one of the most important sub-systems of the satellite in charge of ... [more] | SANE2015-50 pp.1-5 |
| AP, RCS, WPT, SAT (Joint) |
2015-11-06 11:45 |
Okinawa | Okinawa Prefectural Museum & Art Museum | FPGA Implementation of Channel Emulator with Automatic Channel Sounding Feedback for MU-MIMO WLAN systems Tran Thi Thao Nguyen, Leonardo Lanante, Yuhei Nagao, Masayuki Kurosaki, Hiroshi Ochi (Kyutech) AP2015-147 |
Regardless of the wireless application, the wireless communication channel is the central point of any wireless communic... [more] | AP2015-147 pp.213-218 |
| SIS | 2015-06-08 15:35 |
Nagasaki | Arkas SASEBO | Hardware Architecture of Generic Soft Cascaded Linear SVM Classifier Eric Aliwarga, Jaehoon Yu, Masahide Hatanaka, Takao Onoye (Osaka Univ.) SIS2015-6 |
Support Vector Machine is renowned as a powerful machine learning algorithm for many classification problems. However, a... [more] | SIS2015-6 pp.29-34 |
| SS | 2015-05-11 15:40 |
Kumamoto | Kumamoto University | Classification of Code Clones in Hardware Description Language Kyohei Uemura, Kenji Fujiwara, Hajimu Iida (NAIST) SS2015-5 |
With the growth of the electric circuit size and complexity, Hardware Description Language (HDL) is widely used in hardw... [more] | SS2015-5 pp.23-28 |
| RCS, SR, SRW (Joint) |
2015-03-05 09:00 |
Tokyo | Tokyo Institute of Technology | Influence of Analog Beamforming Configuration on Massive MIMO with Hybrid Beamforming in High Frequency Bands Satoshi Suyama, Tatsunori Obara, Jiyun Shen, Yukihiko Okumura (NTT DOCOMO) RCS2014-337 |
In order to tackle rapidly increasing traffic, 5th generation (5G) radio access network in mobile communications introdu... [more] | RCS2014-337 pp.213-218 |
| CPSY | 2014-11-13 12:55 |
Hiroshima | Hiroshima University | Consideration for Acceleration of Feature Transformation based on the Bag-of-Features for Colorectal Endoscopic Images Koki Sugi, Tetsushi Koide, Anh-Tuan Hoang, Takumi Okamoto, Tatsuya Shimizu, Toru Tamaki, Bisser Raytchev, Kazufumi Kaneda, Yoko Kominami, Shigeto Yoshida, Shinji Tanaka (Hiroshima Univ.) CPSY2014-55 |
With the increase of colorectal cancer patients in recent years, the computer-aided diagnosis (CAD) system which support... [more] | CPSY2014-55 pp.7-12 |
| CPSY, DC (Joint) |
2014-07-28 18:15 |
Niigata | Toki Messe, Niigata | Performance Evaluation of Speculative Parallel Processing Utilizing Hardware Transactional Memory on Commercial Multi-core CPU Yutaka Matsuno, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2014-16 |
Recently, it becomes essential to use parallel computation utilizing thread level parallelism as a method to utilize a s... [more] | CPSY2014-16 pp.37-42 |
| RECONF | 2014-06-12 16:25 |
Miyagi | Katahira Sakura Hall | Design of an FPGA-Based Accelerator for Shortest-Path Search over Large-Scale Graphs Yasuhiro Takei, Masanori Hariyama, Michitaka Kameyama (Tohoku Univ.) RECONF2014-15 |
Shortest-path search over large scale graphs plays an important role in various applications. However, shortest path alg... [more] | RECONF2014-15 pp.79-83 |
| NS, IN (Joint) |
2014-03-07 09:30 |
Miyazaki | Miyazaki Seagia | Hardware Design and Evaluation of a High-speed CCN Router Using CAM Atsushi Ooka (Osaka Univ.), Shingo Ata (Osaka City Univ.), Kazunari Inoue (NNCT), Masayuki Murata (Osaka Univ.) IN2013-161 |
Content-centric networking (CCN) that is an innovative network architecture requires routers with performance far supe... [more] |
IN2013-161 pp.105-110 |
| VLD | 2014-03-04 11:10 |
Okinawa | Okinawa Seinen Kaikan | An Hardware Implementation of Motion Estimation Technology Using High Level Synthesis Shota Nagai, Takashi Kambe (Kinki Univ.), Gen Fujita (Osaka Electro-Comm. Univ.) VLD2013-146 |
Recently, video coding technology is used widely and is demanded higher quality and speeder. Therefore, we design hardwa... [more] | VLD2013-146 pp.73-77 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-29 14:10 |
Kagoshima | A Method and Evaluation of Dynamic Relocation for Shared Multi-FPGA System Yuta Ukon, Takuya Otsuka, Takashi Aoki, Yusuke Sekihara, Akihiko Miyazaki (NTT) VLD2013-100 DC2013-66 |
Recently, it is expected to provide high-load services such as analysis of big data or image processing in a data center... [more] | VLD2013-100 DC2013-66 pp.281-286 |
|
| QIT (2nd) |
2013-11-18 - 2013-11-19 |
Tokyo | Waseda Univ. | [Poster Presentation]
A Hardware Quantum Circuit Simulator Architecture based on Register Reordering Miki Matsuyama, Yumi Yokoo, Masaki Nakanishi (Yamagata Univ.) |
Quantum circuit simulators play an important role when we evaluate quantum algorithms. Quantum computation can be regard... [more] | |
| CPSY | 2013-11-08 11:30 |
Hiroshima | Real-Time Speed Traffic-Sign Recognition Architecture Using Local Feature Value Masaharu Yamamoto, Anh-Tuan Hoang, Mutsumi Omori, Tetsushi Koide (Hiroshima Univ.) CPSY2013-46 |
The purpose of this research is development of an algorithm for compact hardware implementation for real-time number rec... [more] | CPSY2013-46 pp.43-48 |
|
| DC, CPSY (Joint) |
2013-08-01 17:00 |
Fukuoka | Kitakyushu-Kokusai-Kaigijyo | A Hardware Support Technique for Fast Pointer Detection in Garbage Collection Kei Ideue, Yuki Satomi, Tomoaki Tsumura, Hiroshi Matsuo (Nagoya Inst. of Tech.) CPSY2013-13 |
Many mobile systems have to achieve both high performance and low memory usage, and the total performance of the wide ra... [more] | CPSY2013-13 pp.19-24 |
| CPSY | 2012-10-12 09:40 |
Hiroshima | A Feature Extraction Hardware Design in Computer-Aided Diagnosis System for Colorectal Endoscopic Images with NBI Magnification Tsubasa Mishima, Satoshi Shigemi, Tetsushi Koide, Toru Tamaki, Bisser Raytchev, Kazufumi Kaneda, Yoko Kominami, Rie Miyaki, Taiji Matsuo, Shigeto Yoshida, Shinji Tanaka (Hiroshima Univ) CPSY2012-33 |
In this paper, we propose a feature extraction hardware design in computer-aided diagnosis system for colorectal for col... [more] | CPSY2012-33 pp.13-18 |
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