Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
HWS |
2022-04-26 10:55 |
Tokyo |
AIST Tokyo Waterfront (Annex) (Primary: On-site, Secondary: Online) |
Deep Learning Side-Channel Attacks against Hardware-Implemented Lightweight Cipher Midori64 Madoka Sako, Kunihiro Kuroda, Yuta Fukuda, Kota Yoshida, Takeshi Fujino (Ritsumeikan Univ.) HWS2022-2 |
Midori is a lightweight cipher and it is developed to achieve superior circuit size, low latency, and low power consumpt... [more] |
HWS2022-2 pp.7-12 |
VLD, HWS [detail] |
2022-03-08 11:00 |
Online |
Online |
Evaluation of a Lightweight Cryptographic Finalist on SROS2 Shu Takemoto, Yoshiya Ikezaki, Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.) VLD2021-94 HWS2021-71 |
In cyber-physical systems, small devices are connected to the network to enable the analysis of sensor values. Also, sin... [more] |
VLD2021-94 HWS2021-71 pp.99-104 |
VLD, HWS [detail] |
2022-03-08 13:00 |
Online |
Online |
Implementation Evaluation of Glitch PUF Using a Low-Latency Cryptography MANTIS Kosuke Hamaguchi, Shu Takemoto, Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.) VLD2021-96 HWS2021-73 |
This paper proposes a low-latency cipher MANTIS based PUF which uses signal glitch during encryption. The security level... [more] |
VLD2021-96 HWS2021-73 pp.111-116 |
VLD, HWS [detail] |
2022-03-08 13:25 |
Online |
Online |
A Study on Small Area Circuits for CMOS Image Sensors with Message Authentication Codes (1)
-- Drive Circuit and Pixel Array Configuration -- Yoshihiro Akamatsu, Hiroaki Ogawa, Tatsuya Oyama, Hayato Tatsuno, Yu Sekioka, Shunsuke Okura, Takeshi Fujino (Ritsumeikan Univ) VLD2021-97 HWS2021-74 |
In edge AI, the information acquired by sensors is classified or recognized at the edge, and therefore, guaranteeing the... [more] |
VLD2021-97 HWS2021-74 pp.117-122 |
CAS, CS |
2022-03-04 13:45 |
Online |
Online |
Evaluation of Trojan Detector for AI Hardware Shu Takemoto, Yoshiya Ikezaki, Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.) CAS2021-94 CS2021-96 |
In recent years, AI edge computing has been expanding to realize real-time inference by implementing AI models on edge d... [more] |
CAS2021-94 CS2021-96 pp.106-111 |
CAS, CS |
2022-03-04 14:35 |
Online |
Online |
Unrolled Architecture oriented Countermeasure Circuit for Low-power Cryptography Midori128 and its Evaluation Shunsuke Miwa, Shu Takemoto, Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.) CAS2021-96 CS2021-98 |
The number of IoT devices is growing rapidly, ensuring security in those devices is an important issue. Lightweight bloc... [more] |
CAS2021-96 CS2021-98 pp.118-123 |
HWS, ICD [detail] |
2021-10-19 15:00 |
Online |
Online |
A Survey on Security Requirements in System-on-Chip(SoC) Yasuyuki Kawanishi, Hirotaka Yoshida (AIST) HWS2021-49 ICD2021-23 |
In the EU, a cybersecurity certification scheme for IoT products based on the Common Criteria is being developed. At tha... [more] |
HWS2021-49 ICD2021-23 pp.43-48 |
BioX, ISEC, SITE, ICSS, EMM, HWS, IPSJ-CSEC, IPSJ-SPT [detail] |
2021-07-20 15:30 |
Online |
Online |
Implimentation of RISC-V TEE using PUF as Root of Trust Kota Yoshida (Ritsumeikan Univ.), Kuniyasu Suzaki (AIST), Takeshi Fujino (Ritsumeikan Univ.) ISEC2021-25 SITE2021-19 BioX2021-26 HWS2021-25 ICSS2021-30 EMM2021-30 |
In society 5.0, acquiring trustworthy data from a huge amount of IoT devices in physical spaces, it is important to veri... [more] |
ISEC2021-25 SITE2021-19 BioX2021-26 HWS2021-25 ICSS2021-30 EMM2021-30 pp.92-97 |
HWS, VLD [detail] |
2021-03-04 13:25 |
Online |
Online |
A Low-Latency Memory Encryption Scheme with Tweakable Block Cipher and Its Hardware Design Maya Oda, Rei Ueno, Naofumi Homma (Tohoku Univ.), Akiko Inoue, Kazuhiko Minematsu (NEC) VLD2020-83 HWS2020-58 |
In this paper, we propose a highly efficient memory protection method based on the Tweakable block cipher (TBC). The lat... [more] |
VLD2020-83 HWS2020-58 pp.85-90 |
HWS, VLD [detail] |
2021-03-04 15:20 |
Online |
Online |
Power Analysis Attack on a Unrolled Midori128 and its Evaluation Shu Takemoto, Yoshiya Ikezaki, Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.) VLD2020-87 HWS2020-62 |
The lightweight block cipher Midori has been proposed as a cryptographic algorithm for low-power operation, which is imp... [more] |
VLD2020-87 HWS2020-62 pp.108-113 |
ICD (2nd) |
2021-03-01 14:10 |
Online |
Online |
Multimodal Sense-and-React Countermeasure Against Physical Attacks on Cryptographic Processors Sho Tada, Yuki Yamashita, Takuji Miki, Makoto Nagata (Kobe Univ.), Noriyuki Miura (Osaka Univ.) |
This paper presents a sense-and-react countermeasure that detects various physical attacks on cryptographic processors a... [more] |
|
ICSS, IPSJ-SPT |
2021-03-02 16:25 |
Online |
Online |
Security Evaluation of PUF utilizing Unrolled Architecture Yusuke Nozaki, Kensaku Asahi, Masaya Yoshikawa (Meijo Univ.) ICSS2020-53 |
To improve the security of LSI circuit, physically unclonable functions (PUF) have been attracted attention. The glitch ... [more] |
ICSS2020-53 pp.160-165 |
VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-18 14:25 |
Online |
Online |
On-chip power supply noise monitoring for evaluation of multi-chip board power delivery networks Daichi Nakagawa, Kazuki Yasuda, Masaru Mashiba, Kazuki Monta, Takaaki Okidono, Takuji Miki, Makoto Nagata (Kobe Univ) VLD2020-31 ICD2020-51 DC2020-51 RECONF2020-50 |
In these days, information and communication technology has been evolving more and more, and hardware security has been ... [more] |
VLD2020-31 ICD2020-51 DC2020-51 RECONF2020-50 pp.115-117 |
ICD, HWS [detail] |
2020-10-26 09:25 |
Online |
Online |
Power Analysis Attack Using Pipeline Scheduling on Pairing Hardware Mitsufumi Yamazaki, Junichi Sakamoto, Tsutomu Matsumoto (YNU) HWS2020-26 ICD2020-15 |
To reduce the latency of pairing calculation for advanced cryptography, hardware implementations with pipelined modular ... [more] |
HWS2020-26 ICD2020-15 pp.7-12 |
ICD, HWS [detail] |
2020-10-26 15:20 |
Online |
Online |
Hardware Trojan using LUT Structure of AI Inference Devices Yusuke Nozaki, Shu Takemoto, Yoshiya Ikezaki, Masaya Yoshikawa (Meijo Univ.) HWS2020-36 ICD2020-25 |
The artificial intelligence (AI) technology has been attracted attention in several fields. On the other hand, security ... [more] |
HWS2020-36 ICD2020-25 pp.65-70 |
ICD, HWS [detail] |
2020-10-26 15:45 |
Online |
Online |
Low-Latency Countermeasure Circuit Oriented Hardware Trojan and its Evaluation Shu Takemoto, Yoshiya Ikezaki, Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.) HWS2020-37 ICD2020-26 |
Outsourcing and the use of IP are the mainstream in the design and manufacturing of system LSIs. On the other hand, the ... [more] |
HWS2020-37 ICD2020-26 pp.71-76 |
ICD, HWS [detail] |
2020-10-26 17:40 |
Online |
Online |
Investigation of High-Efficiency Simulation Method for Detection of Physical Design Falsification in Secure IC Chip Kazuki Yasuda, Kazuki Monta, Daichi Nakagawa, Makoto Nagata (Kobe Univ.) HWS2020-41 ICD2020-30 |
With the development of the IoT society in recent years, various security measures have been developed for integrated ci... [more] |
HWS2020-41 ICD2020-30 pp.94-98 |
DC |
2020-02-26 12:25 |
Tokyo |
|
Glitch PUF utilizing Unrolled Architecture and its Evaluation Yusuke Nozaki, Masaya Yoshikawa (Meijo Univ.) DC2019-91 |
The physically unclonable functions (PUFs) have attracted attention as technologies for authentication of large scale in... [more] |
DC2019-91 pp.31-36 |
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-14 16:35 |
Ehime |
Ehime Prefecture Gender Equality Center |
Test Generation for Hardware Trojan Detection Using the Delay Difference of a Pair of Independent Paths Suguru Rikino, Yushiro Hiramoto, Satoshi Ohtake (Oita Univ.) VLD2019-46 DC2019-70 |
Hardware Trojan detection is important to ensure security of LSIs.
If a hardware Trojan is inserted in a signal line o... [more] |
VLD2019-46 DC2019-70 pp.151-155 |
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2019-11-15 09:40 |
Ehime |
Ehime Prefecture Gender Equality Center |
Modeling attacks against device authentication using CMOS image sensor PUF Hiroshi Yamada, Shunsuke Okura, Mitsuru Shiozaki, Masayoshi Shirahata, Takeshi Fujino (Ritsumeikan Univ.) ICD2019-34 IE2019-40 |
A CMOS image sensor physically unclonable function (CIS-PUF) for device authentication by the unique responses extracted... [more] |
ICD2019-34 IE2019-40 pp.31-36 |