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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2008-05-23 11:15 |
Fukushima | The University of Aizu | How fast is an FPGA in image processing ? Takashi Saegusa, Tsutomu Maruyama, Yoshiki Yamaguchi (Univ. of Tsukuba)  RECONF2008-15 |
In image processing, FPGAs have shown very high performance in spite of their slow operational frequency. % The main ... [more] |
RECONF2008-15 pp.83-88 |
| RECONF, CPSY, VLD, IPSJ-SLDM | 2008-01-16 13:45 |
Kanagawa | Hiyoshi Campus, Keio University | Evaluation of the Small-World Network Routing Structure for Cluster Based FPGAs Yuzo Nishioka, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) VLD2007-108 CPSY2007-51 RECONF2007-54 |
In deep sub-micron process, the wire delay exceeds the switching delay. The wire delay is dominant in the total delay. F... [more] | VLD2007-108 CPSY2007-51 RECONF2007-54 pp.19-24 |
| RECONF | 2007-09-21 09:00 |
Shiga | Ritsumeikan Univ. Biwako Kusatsu Campus (Shiga) | A Study of Performance-driven Simultaneous Clustering and Placement for FPGA Hiroshi Shinohara, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2007-22 |
FPGA has a rich flexibility to emulate various circuits, and their performance depend on design tools. In this paper，we... [more] |
RECONF2007-22 pp.41-46 |
| PRMU | 2007-01-18 16:45 |
Kyoto | The Method to Describe Image by Low Dimension using the Center of Clusters on Self-Organizing Map Ichiro Sudo, Tomomi Yuno, Masatoshi Yokokawa, Kenji Kudo, Masatoshi Sekine (TUAT) |
We proposes the method of expressing the low level of the image that uses clustering by Self Organization Map (SOM) and ... [more] | PRMU2006-193 pp.61-66 |
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| RECONF | 2005-12-02 11:50 |
Fukuoka | Kitakyushu International Conference Center | Development of an FPGA Board toward Reconfigurable Cluster Computing Kazuto Hewa, Tomohiro Okajima, Hidetomo Shibamura, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) |
PC cluster has been applied on the fields of Scientific and Engineering Calculations. In this study, we are developing ... [more] |
RECONF2005-76 pp.25-30 |
| RECONF | 2005-05-12 10:00 |
Kyoto | Kyoto University | Development of clustering tool to reduce area of chip and delay Masaki Kobata, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) |
In this paper,we present a clustering technique for area and delay reduction in clustered FPGAs. This technique uses tw... [more] |
RECONF2005-2 pp.7-12 |
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