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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| DC, CPSY | 2015-04-17 09:25 |
Tokyo | Off-loading to PEACH2 of Gravitational Calculation Chiharu Tsuruta, Takuya Kuhara (Keio univ.), Miki Yohei (Univ. of Tsukuba), Hideharu Amano (Keio univ.)  CPSY2015-2 DC2015-2 |
On-the-fly computation in the field-programmable gate array (FPGA) used for the switching hub is one potential way to ... [more] |
CPSY2015-2 DC2015-2 pp.7-12 |
|
| RECONF | 2014-09-18 13:00 |
Hiroshima | [Invited Talk]
Architecture Development for the Real-time Computer-Aided Diagnosis of Colorectal Endoscopic Images with NBI Magnification Tetsushi Koide (Hiroshima Univ.) RECONF2014-17 |
With the increase in patients of colorectal cancer in recent years, the requirement of the effective diagnostic support ... [more] | RECONF2014-17 pp.1-6 |
|
| US, EA (Joint) |
2013-01-24 16:40 |
Kyoto | Kambaikan, Doshisha Univ. | [Invited Talk]
Development of sound field rendering technology
-- to aim at realization of silicon concert hall -- Takao Tsuchiya (Doshisha Univ.), Yukio Iwaya (Tohoku Gakuin Univ.), Makoto Otani (Shinshu Univ.), Yasushi Inoguchi (JAIST) US2012-96 EA2012-127 |
This report describes the overview of the development project of the ``Silicon concert hall (SiCH)'', which is a real ... [more] |
US2012-96 EA2012-127 pp.47-52 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-27 13:00 |
Fukuoka | Centennial Hall Kyushu University School of Medicine | [Invited Talk]
Application Examples of FPGA
-- Parallel Computers and Network -- Yuetsu Kodama (Univ. of Tsukuba) RECONF2012-46 |
I introduce my previous and current research works using FPGA. First is EM-X on REX, that is an emulator of original mu... [more] |
RECONF2012-46 pp.1-2 |
| RECONF | 2012-09-19 11:05 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | Prototyping Tightly-Coupled FPGA Cluster for Lattice Boltzmann Computation Kentaro Sano, Yoshiaki Kono, Hayato Suzuki, Ryotaro Chiba, Satoru Yamamoto (Tohoku Univ.) RECONF2012-40 |
This paper presents a prototype of a tightly-coupled FPGA cluster for LBM computation, which is one of the computing met... [more] | RECONF2012-40 pp.95-100 |
| RECONF | 2012-09-19 13:15 |
Shiga | Epock Ritsumei 21, Ritsumeikan Univ. | A Design Framework for Reconfigurable IPs with VLSI CADs Qian Zhao, Kazuki Inoue, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2012-41 |
The conventional FPGA design CAD flows evaluate FPGA architecture by implementing benchmarks through the following steps... [more] | RECONF2012-41 pp.101-106 |
| RECONF | 2012-05-29 14:25 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Scalability Analysis of Tightly-Coupled FPGA-Cluster for Lattice Boltzmann Computation Yoshiaki Kono, Kentaro Sano, Ryotaro Chiba, Satoru Yamamoto (Tohoku Univ.) RECONF2012-10 |
This paper presents an architecture and its performance model of an LBM accelerator to be implemented on a tightly-coup... [more] |
RECONF2012-10 pp.55-60 |
| VLD, CPSY, RECONF, IPSJ-SLDM [detail] | 2012-01-26 14:45 |
Kanagawa | Hiyoshi Campus, Keio University | Partial Reconfiguration and Its Application on a PC-FPGA Hybrid Cluster Ryo Ozaki, Akira Uejima, Masaki Kohata (Okayama Univ. of Sci.) VLD2011-116 CPSY2011-79 RECONF2011-75 |
Parallel processing by PC cluster and hardware acceleration by FPGA are useful technologies in a field of high performan... [more] | VLD2011-116 CPSY2011-79 RECONF2011-75 pp.147-152 |
| RECONF | 2011-09-26 13:30 |
Aichi | Nagoya Univ. | A Novel Cluster Structure based on Input Sharing of LUTs Toshiya Takahashi, Kazuki Inoue, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2011-25 |
Cluster-based FPGAs are composed of logic clusters having LUTs which are basic logic elements. At each of logic cluster... [more] |
RECONF2011-25 pp.19-24 |
| RECONF | 2011-09-26 13:55 |
Aichi | Nagoya Univ. | FPGA placement based on Self-Organized Map Yasuaki Tomonari, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2011-26 |
Cell placement is an important phase of current FPGA(Field Programmable Gate Array) circuit design.However, this placeme... [more] | RECONF2011-26 pp.25-30 |
| RECONF, VLD, CPSY, IPSJ-SLDM [detail] | 2011-01-17 12:05 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Parallelization of the channel width search for FPGA routing Hiroomi Sawada, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto) VLD2010-89 CPSY2010-44 RECONF2010-58 |
As the FPGA becomes resourceful, the design time becomes longer. Especially, routing process occupies the large portion... [more] |
VLD2010-89 CPSY2010-44 RECONF2010-58 pp.31-36 |
| RECONF, VLD, CPSY, IPSJ-SLDM [detail] | 2011-01-18 11:15 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Optimization of Local Routing Networks in a Logic Block for Cluster Based FPGAs Yuji Masumitsu, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) VLD2010-104 CPSY2010-59 RECONF2010-73 |
Feild programmable gate arrays (FPGAs) are mostly cluseter-based FPGAs. In a cluster-based FPGA, a logic block consists ... [more] | VLD2010-104 CPSY2010-59 RECONF2010-73 pp.139-144 |
| RECONF, VLD, CPSY, IPSJ-SLDM [detail] | 2011-01-18 16:45 |
Kanagawa | Keio Univ (Hiyoshi Campus) | A Gateway and Remote Call Mechanisms for a PC-FPGA Hybrid Cluster Masaki Kohata, Akira Uejima, Ryo Ozaki (Okayama Univ. of Sci.) VLD2010-114 CPSY2010-69 RECONF2010-83 |
Parallel processing by PC cluster and hardware acceleration by FPGA are useful technologies in a field of high performan... [more] | VLD2010-114 CPSY2010-69 RECONF2010-83 pp.199-204 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 13:15 |
Fukuoka | Kyushu University | Circuit Generation using High-Level Synthesis Tool in Reconfigurable HPC System Based on FPGA Arrays Kenichi Takahashi, Jiang Li, Hiroki Isogai, Hiroki Banba, Hakaru Tamukoh, Masatoshi Sekine (TUAT) RECONF2010-39 |
In recent years, HPC system architectures comprised of GPUs or FPGAs are becoming common. We propose a Reconfigurable HP... [more] | RECONF2010-39 pp.1-6 |
| RECONF | 2010-05-14 10:55 |
Nagasaki | Software-Hardware Communication and Remote Call on a PC-FPGA Hybrid Cluster Masaki Kohata, Akira Uejima, Ryo Ozaki (Okayama Univ. of Sci.) RECONF2010-12 |
Parallel processing with PC cluster and hardware acceleration with FPGA are useful technologies in a field of high perfo... [more] | RECONF2010-12 pp.63-68 |
|
| RECONF | 2009-09-17 14:50 |
Tochigi | Utsunomiya Univ. | Low-power oriented clustering and placement tools using routability for FPGAs Shinya Imaizumi, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2009-23 |
Power consumption of Field Programmable Gate Arrays (FPGAs) is larger than Application Specific Integrated Circuits (ASI... [more] | RECONF2009-23 pp.25-30 |
| RECONF | 2009-05-15 10:00 |
Fukui | A low-power clustering tool using both routability and activity for FPGAs Junya Eto, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2009-10 |
Although FPGA(Field Programmable Gate Array) has high exibility, there is a problem that power consumption is larger tha... [more] | RECONF2009-10 pp.55-60 |
|
| RECONF | 2009-05-15 13:40 |
Fukui | Performance comparison of GPU and FPGA in image processing Shuichi Asano, Tsutomu Maruyama (Univ. of Tsukuba) RECONF2009-15 |
Many applications in image processing have high inherent parallelism. FPGAs have shown very high performance in spite of... [more] | RECONF2009-15 pp.85-90 |
|
| RECONF | 2008-09-25 15:10 |
Okayama | Okayama Univ. | A Proposal of the Network Switch for a PC cluster that can change connection of Distributed Shared Memory Yoshimasa Ohnishi, Takaichi Yoshida (Kyushu Institute of Tech.) RECONF2008-27 |
Small-scale PC clusters which are composed of some tens of nodes do not have enough resources. Such small-scale PC clust... [more] | RECONF2008-27 pp.27-32 |
| RECONF | 2008-09-25 15:40 |
Okayama | Okayama Univ. | A Hardware Evaluation System for 2D Interconnection Networks by using an FPGA Based Network Card Akira Uejima, Masaki Kohata (Okayama Univ. of Sci.) RECONF2008-28 |
This paper describes an FPGA based network interface card for PC clusters and a hardware network evaluation system by us... [more] | RECONF2008-28 pp.33-38 |
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