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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, SDM | 2008-07-17 15:05 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A Fully Logic-Process-Compatible, SESO-memory Cell with 0.1-FIT/Mb Soft Error, 100-MHz Random Cycle, and 100-ms Retention Norifumi Kameshiro, Takao Watanabe, Tomoyuki Ishii, Toshiyuki Mine (Hitachi, Ltd.), Toshiaki Sano (Renesas), Hidefumi Ibe, Satoru Akiyama (Hitachi, Ltd.), Kazumasa Yanagisawa, Takashi Ipposhi, Toshiaki Iwamatsu, Yasuhiko Takahashi (Renesas)  SDM2008-136 ICD2008-46 |
We proposed a fully logic compatible process for a single electron shut-off transistor (SESO). A 1-kb memory-cell array ... [more] | SDM2008-136 ICD2008-46 pp.47-52 |
| SIS | 2008-06-13 13:15 |
Hokkaido | An Architecture of Photo Core Transform in HD Photo Coding System for Embedded System of Various Bandwidths Koichi Hattori (Kyoto Univ.), Hiroshi Tsutsui (Osaka Univ.), Hiroyuki Ochi (Kyoto Univ.), Yukihiro Nakamura (Ritsumeikan Univ.) SIS2008-21 |
In this paper, we propose a novel architecture of photo core transform (PCT) which is used as transformation of image da... [more] | SIS2008-21 pp.39-44 |
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| DC, CPSY, IPSJ-SLDM, IPSJ-EMB | 2008-03-27 09:50 |
Kagoshima | Coexistent environment of Responsiveness and Functionality on multi-core processor, MPCore.
-- Toward harmonizing Control with Information processing -- Tsuyoshi Abe, Junji Sakai (NEC) DC2007-87 CPSY2007-83 |
The next generation embedded system will require not only the control processing but also the information processing abi... [more] | DC2007-87 CPSY2007-83 pp.19-24 |
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| DC, CPSY, IPSJ-SLDM, IPSJ-EMB | 2008-03-27 16:55 |
Kagoshima | A Realization of RPC in Embedded Component Systems Takuya Azumi (Nagoya Univ.), Hiroshi Oyama (OKUMA), Hiroaki Takada (Nagoya Univ.) DC2007-100 CPSY2007-96 |
This paper presents a Remote Procedure Call (RPC) channel in an embedded component system. The RPC channel is one of the... [more] | DC2007-100 CPSY2007-96 pp.97-102 |
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| DC, CPSY, IPSJ-SLDM, IPSJ-EMB | 2008-03-27 17:45 |
Kagoshima | Allocation of Scratch-Pad Memory in Non-Preemptive Multi-Task Systems Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada (Nagoya Univ.) DC2007-102 CPSY2007-98 |
In this paper, we propose three approaches to allocation of scratch-pad memory for non-preemptive fixed-priority multi-t... [more] | DC2007-102 CPSY2007-98 pp.109-114 |
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| VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-20 10:05 |
Fukuoka | Kitakyushu International Conference Center | A Memory Management Technique for Energy Reduction in Multi-Task Embedded Applications Seiichiro Yamaguchi, Masanori Muroyama, Tohru Ishihara, Hiroto Yasuura (Kyushu Univ.) |
Memory systems consume a significant amount of the energy in embedded systems. Static code placement techniques using sc... [more] | VLD2007-74 DC2007-29 pp.25-29 |
| VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-20 10:30 |
Fukuoka | Kitakyushu International Conference Center | An ILP Model of Code Placement Problem for Minimizing the Energy Consumption in Embedded Processors Yuriko Ishitobi, Tohru Ishihara, Hiroto Yasuura (Kyushu Univ.) |
This paper formulates a code placement problem to optimize the total energy consumption of a CPU core, on-chip memories ... [more] | VLD2007-75 DC2007-30 pp.31-36 |
| ICD | 2007-04-12 09:00 |
Oita | MRAM Cell Technology for High-speed SoCs Noboru Sakimura, Tadahiko Sugibayashi, Ryusuke Nebashi, Hiroaki Honjo, Kenichi Shimura, Naoki Kasai (NEC) ICD2007-1 |
We has succeeded in developing new MRAM cell technology suitable for high-speed memory macro embedded in next generation... [more] | ICD2007-1 pp.1-5 |
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| ICD | 2007-04-12 11:10 |
Oita | [Invited Talk]
A 512kB Embedded Phase Change Memory with 416kB/s Write Throughput at 100μA Cell Write Current Akira Kotabe, Satoru Hanzawa (Hitachi), Naoki Kitai (Hitachi ULSI), Kenichi Osada, Yuichi Matsui, Nozomu Matsuzaki, Norikatsu Takaura (Hitachi), Masahiro Moniwa (Renesas), Takayuki Kawahara (Hitachi) ICD2007-5 |
An experimental 512-kB embedded Phase Change Memory (PCM) is developed in a 0.13-μm 1.5-V CMOS technology. Three circuit... [more] | ICD2007-5 pp.23-28 |
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| ICD | 2006-04-13 16:40 |
Oita | Oita University | [Panel Discussion]
What is your urgent task in R/D of new embedded memories? Hideto Hidaka (Renesas), Masao Taguchi (SPANSION), Takayuki Kawahara (Hitachi), Daisaburo Takashima (Toshiba), Shuichi Ueno (Renesas), Masashi Takata (Kanazawa Univ.), Masafumi Takahashi (Toshiba) |
Recent advent of emerging memory devices circa 2000 has seen discussions directed mainly to stand-alone memory applicati... [more] | ICD2006-9 p.49 |
| ICD | 2006-04-14 14:45 |
Oita | Oita University | An Internal Voltage Generation System of Flash Memory Module Jiro Ishikawa, Toshihiro Tanaka, Akira Kato, Takashi Yamaki, Yukiko Umemoto, Takeshi Shimozato, Isao Nakamura, Yutaka Shinagawa (Renesas Technology Corp.) |
We present a new internal voltage generation system of flash memory module embedded in a microcontroller. One of the fea... [more] | ICD2006-20 pp.109-113 |
| ICD, ITE-CE | 2006-01-26 10:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Phase Change RAM Operated with 1.5-V CMOS as Low Cost Embedded Memory Satoru Hanzawa, Kenichi Osada, Takayuki Kawahara, Riichiro Takemura (Hitachi CRL), Naoki Kitai (Hitachi ULSI), Norikatsu Takaura, Nozomu Matsuzaki, Kenzo Kurotsuchi (Hitachi CRL), Hiroshi Moriya (Hitachi MERL), Masahiro Moniwa (Renesas) |
This paper describes a phase change (PC) RAM operated at the lowest possible voltage, 1.5 V, with a CMOS memory array, u... [more] | ICD2005-206 pp.7-12 |
| SIP, ICD, IE, IPSJ-SLDM | 2005-10-20 16:30 |
Miyagi | Ichinobo, Sakunami-Spa | A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI Takayuki Gyohten, Fukashi Morishita, Hideyuki Noda (Renesas Technology Corp.), Mako Okamoto (Daioh Electric Corp.), Takashi Ipposhi, Shigeto Maegawa, Katsumi Dosaka, Kazutami Arimoto (Renesas Technology Corp.) |
We propose a novel capacitorless twin-transistor random access memory (TTRAM). The 2Mb test device has been fabricated o... [more] | SIP2005-113 ICD2005-132 IE2005-77 pp.107-112 |
| SIP, ICD, IE, IPSJ-SLDM | 2005-10-21 10:30 |
Miyagi | Ichinobo, Sakunami-Spa | Single-Chip Multi-Processor Integrating Quadruple 8-Way VLIW Processors Atsushi Tanaka, Atsuhiro Suga, Fumihiko Hayakawa, Shinichiro Tago, Satoshi Imai (Fujitsu Lab) |
To realize the low power consumption and low-cost equipment needed to encode high-definition broadcasts, we have develo... [more] | SIP2005-119 ICD2005-138 IE2005-83 pp.25-29 |
| ICD, SDM | 2005-08-19 13:25 |
Hokkaido | HAKODATE KOKUSAI HOTEL | 0.5V Asymmetric Three-Tr. Cell (ATC) DRAM Using 90nm Generic CMOS Logic Process Motoi Ichihashi, Haruki Toda, Yasuo Itoh, Koichiro Ishibashi (STARC) |
Asymmetric Three-Tr. Cell (ATC) DRAM which has one P- and two N-MOS transistors for one unit cell is proposed with "forc... [more] | SDM2005-151 ICD2005-90 pp.49-54 |
| ICD | 2005-04-14 11:40 |
Fukuoka | A 128Mb DRAM Using a 1T Gain Cell(FBC) on SOI Takashi Ohsawa, Katsuyuki Fujita, Kosuke Hatsuda (Toshiba), Tomoki Higashi (Toshiba Microelectronics), Mutsuo Morikado, Yoshihiro Minami, Tomoaki Shino, Hiroomi Nakajima, Kazumi Inoh, Takeshi Hamamoto, Shigeyoshi Watanabe (Toshiba) |
We report on a 128Mbit DRAM design using the capacitor-less DRAM cell or the floating body cell(FBC) on SOI. The cell of... [more] | ICD2005-5 pp.23-28 |
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| ICD | 2005-04-14 13:00 |
Fukuoka | [Invited Talk]
* Hiroyuki Yamauchi (Matsushita) |
Based on the actual examples of where, how and why each memory is used, the representative embedded memories are classif... [more] | ICD2005-6 pp.29-34 |
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| ICD | 2005-04-15 10:30 |
Fukuoka | A 1.2V 1Mbit Embedded MRAM Core with Folded Bit-Line Array Architecture Takaharu Tsuji (Renesas Technorogy), Hiroaki Tanizaki (Renesas Device Design), Masatoshi Ishikawa, Jun Otani, Yuichiro Yamaguchi, Shuichi Ueno, Tsukasa Oishi, Hideto Hidaka (Renesas Technorogy) |
A 1Mbit MRAM with a 0.81um2 1-Transistor 1-Magnetic Tunnel Junction (1T-1MTJ) cell using 0.13um 4LM logic technology has... [more] | ICD2005-13 pp.1-6 |
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