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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 20 of 58  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF, VLD 2024-01-30
13:45
Kanagawa AIRBIC Meeting Room 1-4
(Primary: On-site, Secondary: Online)
Implementation of External Memory Access for Binary Synthesis Using General-Purpose High-Level Synthesizer
Sho Kishimoto, Nagisa Ishiukra (Kwansei Gakuin Univ.) VLD2023-95 RECONF2023-98
In this article, we present a method for implementing external memory access within the context of binary synthesis util... [more] VLD2023-95 RECONF2023-98
pp.87-92
SS, MSS 2022-01-12
10:05
Nagasaki Nagasakiken-Kensetsu-Sogo-Kaikan Bldg.
(Primary: On-site, Secondary: Online)
Multitask Scheduling for Reducing Total Memory Consumption while Satisfying Deadlines using Adaptive Control according to Dynamic Change of Task Memory Consumption
Ryosuke Arai, Akio Nakata (Hiroshima City Univ) MSS2021-48 SS2021-35
The authors have previously proposed a multi-task scheduling method LMCLF, which can reduce the total memory usage of th... [more] MSS2021-48 SS2021-35
pp.95-99
CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] 2021-03-26
14:40
Online Online Non Stop Processor with Non Volatile Element
Shota Nakabeppu, Nao Sugiyama, Nobuyuki Yamasaki (Keio Univ.), Kenta Suzuki, Keizo Hiraga, Yasuo Kanda (Sony Semiconductor Solutions) CPSY2020-66 DC2020-96
In recent years, embedded systems such as wearable devices and robots have become widespread. Wear-
able devices often ... [more]
CPSY2020-66 DC2020-96
pp.97-102
SP, EA, SIP 2020-03-03
09:00
Okinawa Okinawa Industry Support Center
(Cancelled but technical report was issued)
A Study for HMM-based embedded speech synthesis using a large-scale speech corpus
Nobuyuki Nishizawa, Tomohiro Obara, Hiromi Ishizaki (KDDI Research, Inc.) EA2019-141 SIP2019-143 SP2019-90
This study shows that our speech synthesis system based on HMM speech synthesis for embedded devices can perform real-ti... [more] EA2019-141 SIP2019-143 SP2019-90
pp.231-236
SS 2019-03-04
10:40
Okinawa   An improved LLF scheduling for reducing heap memory consumption in multiprocessor real-time system by considering laxity time
Yuki Machigashira, Akio Nakata (Hirosima City Univ.) SS2018-55
Real-time embedded systems are often designed as multitasking systems in order to improve responsiveness to multiple ext... [more] SS2018-55
pp.19-24
SDM 2018-01-30
14:00
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Reliability and Scalability of FinFET Split-Gate MONOS Array with Tight Vth Distribution for 16/14nm-node Embedded Flash
Shibun Tsuda, Tomoya Saito, Hirokazu Nagase, Yoshiyuki Kawashima, Atsushi Yoshitomi, Shinobu Okanishi, Tomohiro Hayashi, Takuya Maruyama, Masao Inoue, Seiji Muranaka, Shigeki Kato, Takuya Hagiwara, Hirokazu Saito, Tadashi Yamaguchi, Masaru Kadoshima, Takahiro Maruyama, Tatsuyoshi Mihara, Hiroshi Yanagita, Kenichiro Sonoda, Tomohiro Yamashita, Yasuo Yamaguchi (renesas) SDM2017-94
Reliability and scalability of split-gate metal-oxide nitride oxide silicon (SG-MONOS) are discussed for 16/14nm-node em... [more] SDM2017-94
pp.13-16
IPSJ-ARC, VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2018-01-18
17:00
Kanagawa Raiosha, Hiyoshi Campus, Keio University Distributed Memory Architecture for High-Level Synthesis from Erlang
Kagumi Azuma, Shoki Hamana, Hidekazu Wakabayashi, Nagisa Ishiura (Kwansei Gakuin Univ.), Nobuaki Yoshida, Hiroyuki Kanbara (ASTEM) VLD2017-75 CPSY2017-119 RECONF2017-63
This paper presents a distributed memory architecture for dedicated
hardware automatically synthesized from Erlang prog... [more]
VLD2017-75 CPSY2017-119 RECONF2017-63
pp.77-82
ICD 2017-04-20
14:55
Tokyo   [Invited Lecture] First demonstration of FinFET Split-Gate MONOS for High-Speed and Highly-Reliable Embedded Flash in 16/14nm-node and beyond
Shibun Tsuda, Yoshiyuki Kawashima, Kenichiro Sonoda, Atsushi Yoshitomi, Tatsuyoshi Mihara, Shunichi Narumi, Masao Inoue, Seiji Muranaka, Takahiro Maruyama, Tomohiro Yamashita, Yasuo Yamaguchi (Renesas Electronics), Digh Hisamoto (Hitachi) ICD2017-7
FinFET split-gate metal-oxide nitride oxide silicon (SG-MONOS) Flash memories have been fabricated and operated for the ... [more] ICD2017-7
pp.35-38
ICD 2017-04-20
15:20
Tokyo   [Invited Talk] Embedded Flash Technology for Automotive Applications
Masaya Nakano, Takashi Ito, Tadaaki Yamauchi, Yasuo Yamaguchi, Takashi Kono, Hideto Hidaka (Renesas Electronics) ICD2017-8
Higher fuel-efficient engine and advanced driver assistance system (ADAS) require the further progress of embedded Flash... [more] ICD2017-8
pp.39-44
SDM 2017-01-30
13:30
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] First Demonstration of FinFET Split-Gate MONOS for High-Speed and Highly-Reliable Embedded Flash in 16/14nm-node and Beyond
Shibun Tsuda, Yoshiyuki Kawashima, Kenichiro Sonoda, Atsushi Yoshitomi, Tatsuyoshi Mihara, Shunichi Narumi, Masao Inoue, Seiji Muranaka, Takahiro Maruyama, Tomohiro Yamashita, Yasuo Yamaguchi (Renesas Electronics), Digh Hisamoto (Hitachi) SDM2016-134
FinFET split-gate metal-oxide nitride oxide silicon (SG-MONOS) Flash memories have been fabricated and operated for the ... [more] SDM2016-134
pp.17-20
RECONF 2016-05-19
17:30
Kanagawa FUJITSU LAB. [Invited Talk] Overviews on key technologies to substantialize 'IoT society'
Toshihiro Matsui, Hisashi Sekine, Hideki Hayashi, Hiroaki Ohkubo, Hirotaka Sunaguchi, Naoyuki Matsuo, Yoshitatsu Sato (NEDO TSC) RECONF2016-16
Regarding non-volatile memories, sensors, embedded software, and cyber security as the key components in the coming IoT ... [more] RECONF2016-16
pp.77-82
ICD 2016-04-14
13:25
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Lecture] A 0.6V Operation ReRAM Program Voltage Generator with Adaptively Optimized Comparator Bias-Current for Batteryless IoT Local Device
Masahiro Tanaka, Tomoya Ishii, Shogo Hachiya, Sheyang Ning, Ken Takeuchi (Chuo Univ.) ICD2016-6
Resistive RAM (ReRAM) is considered as candidates for batteryless IoT local device because of the low voltage and low po... [more] ICD2016-6
pp.27-32
ICD 2016-04-15
10:55
Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] A 90nm Embedded 1T-MONOS Flash Macro for Automotive Applications with 0.07mJ/8kB Rewrite Energy and Endurance Over 100M Cycles Under Tj of 175°C
Satoru Nakanishi, Hidenori Mitani, Ken Matsubara, Hiroshi Yoshida, Takashi Kono, Yasuhiko Taito, Takashi Ito, Takashi Kurafuji, Kenji Noguchi, Hideto Hidaka, Tadaaki Yamauchi (Renesas) ICD2016-15
A first-ever 90nm embedded 1T-MONOS Flash macro is presented to realize automotive reliability and simple process integr... [more] ICD2016-15
pp.77-81
ICD, CPSY 2015-12-17
10:40
Kyoto Kyoto Institute of Technology Improvement of TLB performance of MIPS-based processor
Gun Muto, Takahiro Sasaki, Yuki Fukazawa, Toshio Kondo (Mie Univ.) ICD2015-65 CPSY2015-78
TLB is onw of the important modules to enhance memory access performance. Generally, increasing the number of TLB entrie... [more] ICD2015-65 CPSY2015-78
pp.13-18
SDM, ICD 2015-08-24
09:30
Kumamoto Kumamoto City [Invited Talk] Highly Reliable TaOx ReRAM with Centralized Filament for 28-nm Embedded Application
Yukio Hayakawa, Atsushi Himeno, Ryutaro Yasuhara, Satoru Fujii, Satoru Ito, Yoshio Kawashima, Yuuichirou Ikeda, Akifumi Kawahara, Ken Kawai, Zhiqiang Wei, Shunsaku Muraoka, Kazuhiko Shimakawa, Takumi Mikawa, Shinichi Yoneda (Panasonic) SDM2015-57 ICD2015-26
For 28-nm embedded application, we have proposed a TaOx-based ReRAM with precise filament positioning and high thermal s... [more] SDM2015-57 ICD2015-26
pp.1-5
SDM, ICD 2015-08-25
09:30
Kumamoto Kumamoto City [Invited Talk] Low-Power Embedded ReRAM Technology for IoT Applications
Makoto Ueki, Akira Tanabe, Hiroshi Sunamura, Mitsuru Narihiro, Kazuya Uejima, Koji Masuzaki, Naoya Furutake, Akira Mitsuiki, Koichi Takeda, Takashi Hase, Yoshihiro Hayashi (Renesas Electronics) SDM2015-65 ICD2015-34
A low-power 2Mb ReRAM macro was developed in 90 nm CMOS platform, demonstrating lower power data-writing (x1/7-x1/10) an... [more] SDM2015-65 ICD2015-34
pp.41-46
ICD 2015-04-16
14:25
Nagano   [Invited Talk] A 28nm Embedded SG-MONOS Flash Macro for Automotive Achieving 200MHz Read Operation and 2.0MB/s Write Throughput at Tj of 170℃
Makoto Muneyasu, Yasuhiko Taito, Masaya Nakano, Takashi Ito, Takashi Kono, Kenji Noguchi, Hideto Hidaka, Tadaaki Yamauchi (Renesas) ICD2015-4
First-ever 28nm embedded SG-MONOS flash macros are presented to realize aggressive device scaling with improved reliabil... [more] ICD2015-4
pp.15-19
ICD, CPSY 2014-12-01
10:00
Tokyo Kikai-Shinko-Kaikan Bldg. Consideration of SIMD Acceleration for a MIPS Instruction Processor -- A case study of processor design contest --
Kosuke Hiraishi, Akihiro Hashimoto, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) ICD2014-73 CPSY2014-85
In the system development using soft core processor on an FPGA (Field Programmable Gate Array), an access to external me... [more] ICD2014-73 CPSY2014-85
pp.1-6
ICD, CPSY 2014-12-01
15:15
Tokyo Kikai-Shinko-Kaikan Bldg. [Poster Presentation] A transparent on-chip instruction cache for reducing power and energy consumption of NV microcontrollers
Dahoo Kim, Itaru Hida, Tetsuya Asai, Masato Motomura (Hokkaido Univ) ICD2014-82 CPSY2014-94
Demands for low energy microcontrollers which are used in sensor nodes have been increasing in recent years. Also most m... [more] ICD2014-82 CPSY2014-94
p.43
ICD, SDM 2014-08-04
13:55
Hokkaido Hokkaido Univ., Multimedia Education Bldg. [Invited Talk] STT-MRAM Development for Embedded Cache Memory
Toshihiro Sugii, Yoshihisa Iba, Masaki Aoki, Hideyuki Noshiro, Koji Tsunoda, Akiyoshi Hatada, Masaaki Nakabayashi, Yuuichi Yamazaki, Atsushi Takahashi, Chikako Yoshida (LEAP) SDM2014-68 ICD2014-37
We report the current status of our development of spin-transfer torque magnetic RAMs (STT-MRAMs) and their integration ... [more] SDM2014-68 ICD2014-37
pp.35-38
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