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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| RECONF | 2011-09-27 09:50 |
Aichi | Nagoya Univ. | A Basic Implementation of LUT-based Dynamic and Partial Reconfiguration from Remote Site Hiroyuki Kawai (Hamamatsu Photonics), Moritoshi Yasunaga (Tsukuba Univ.)  RECONF2011-34 |
In this study we implement a mechanism that makes it possible to execute dynamic and partial reconfigurationfrom remote ... [more] | RECONF2011-34 pp.69-74 |
| RECONF | 2011-05-12 13:30 |
Hokkaido | Hokkaido Univ. (Faculty of Eng., B3 Bldg.) | Context Synchronization Method for Reliable Softcore Processor System Makoto Fujino, Noritaka Kai, Yoshihiro Ichinomiya, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) RECONF2011-5 |
SRAM-based FPGAs are vulnerable to a SEU, which is induced by radiation effect. The SEU's effects on configuration mem... [more] |
RECONF2011-5 pp.25-30 |
| IN, NS (Joint) |
2011-03-03 11:10 |
Okinawa | Okinawa Convention Center | Dynamic Configuration System for Wireless Mesh Networks Yoshifumi Hoda, Takumi Miyoshi (Shibaura Inst. Tech.), Chihiro Hirata, Hirobumi Watanabe (Inter Energy Co., Ltd.) NS2010-190 |
Wireless mesh networks (WMNs) are very scalable wireless multi-hop network constructed by radio-connected access points.... [more] | NS2010-190 pp.151-156 |
| VLD | 2011-03-03 14:10 |
Okinawa | Okinawaken-Danjo-Kyodo-Sankaku Center | A Circuit Synthesis for Dynamic Reconfigurable Processor Nobuyuki Araki, Takashi Kambe (Kinki Univ.) VLD2010-131 |
Dynamic reconfiguraible processors can implement large-scale and complicated circuits by changing its configurations dur... [more] | VLD2010-131 pp.87-92 |
| RECONF, VLD, CPSY, IPSJ-SLDM [detail] | 2011-01-18 10:20 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Evaluation of switchable AES S-box circuit using dynamic and partial reconfiguration Naoko Yamada (Keio Univ.), Keisuke Iwai, Takakazu Kurokawa (NDA), Hideharu Amano (Keio Univ.) VLD2010-102 CPSY2010-57 RECONF2010-71 |
Recently, the threat of side channel attack to the hardware encryption circuits is increasing. In order to cope with it... [more] |
VLD2010-102 CPSY2010-57 RECONF2010-71 pp.127-132 |
| RECONF, VLD, CPSY, IPSJ-SLDM [detail] | 2011-01-18 10:55 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Feasibility of JHDL for Dynamically Reconfigurable Hardware Design Naomichi Furushima, Nobuya Watanabe, Akira Nagoya (Okayama Univ.) VLD2010-103 CPSY2010-58 RECONF2010-72 |
To develop applications for dynamically reconfigurable hardware, the description language which increases the efficienc... [more] | VLD2010-103 CPSY2010-58 RECONF2010-72 pp.133-138 |
| RECONF, VLD, CPSY, IPSJ-SLDM [detail] | 2011-01-18 14:30 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Implementation of Dynamic Reconfigurable Processor with Multi-Accelerator Shuhei Igari, Junji Kitamichi, Yuichi Okuyama, Kenichi Kuroda (Aizu Univ.) VLD2010-108 CPSY2010-63 RECONF2010-77 |
Recently, System on a Chip (SoC) has problems increasing of the scale of circuit and design cost, because SoC contains m... [more] | VLD2010-108 CPSY2010-63 RECONF2010-77 pp.163-168 |
| RECONF | 2010-09-16 11:00 |
Shizuoka | Shizuoka University (Faculty of Eng., Hall 2) | Development of an On-chip Pattern Recognition System using Dynamic and Partial Reconfiguration Hiroyuki Kawai, Moritoshi Yasunaga (Tsukuba Univ.) RECONF2010-18 |
In this paper, we develop an on-chip pattern recognition system. The feature of this system is that two Microblaze core... [more] |
RECONF2010-18 pp.1-6 |
| RECONF | 2010-09-17 11:00 |
Shizuoka | Shizuoka University (Faculty of Eng., Hall 2) | Removing context memory from Multi-context Dynamically Reconfigurable Processors Hideharu Amano, Masayuki Kimura, Nobuaki Ozaki (Keio Univ.) RECONF2010-34 |
Although context memory or configuration cache is a key mechanism for quick dyna mic reconfiguration of multi-context ... [more] |
RECONF2010-34 pp.97-102 |
| RECONF | 2010-05-14 14:05 |
Nagasaki | A translational system using dynamic reconfigurable processor Kei Kinoshita, Daisuke Takano, Tomoyuki Okamura, Tetsuhiko Yao, Yoshiki Yamaguchi (Univ. of Tsukuba) RECONF2010-17 |
The demand to capture a wide-angle and high-definition video stream has been risen for systems of surveillance, in-vehic... [more] | RECONF2010-17 pp.93-98 |
|
| DC, CPSY | 2010-04-13 17:20 |
Tokyo | Fault-tolerant FPGA Architecture Takashi Okada, Takanobu Kita, Ryota Shioya, Masahiro Goshima, Shuichi Sakai (Tokyo Univ.) CPSY2010-7 DC2010-7 |
Since electric devices for space applications are likely to experience radiation induced errors, such as the Single Even... [more] | CPSY2010-7 DC2010-7 pp.33-37 |
|
| RCS, AN, MoNA, SR (Joint) |
2010-03-03 16:20 |
Kanagawa | YRP | Coexistence Manager of Heterogeneous TVWS Networks Chen Sun, Ha Nguyen Tran, Yohannes D. Alemseged, Hiroshi Harada (NICT) SR2009-100 |
This paper address the coexistence issue of cognitive radio system (CRS). In particular we focus on the coexistence of s... [more] | SR2009-100 pp.67-71 |
| CS, OCS (Joint) |
2010-01-28 11:45 |
Yamaguchi | Kaikyo Messe Shimonoseki | A burst-mode transimpedance amplifier for 1G/10G-EPON systems
-- Using quick, highly accurate automatic offset compensation technique -- Susumu Nishihara, Makoto Nakamura, Tsuyoshi Ito, Takeshi Kurosaki, Yusuke Ohtomo, Akira Okada (NTT Corp.) OCS2009-102 |
This paper describes a 10G burst-mode transimpedance amplifier (TIA) featuring fast gain switching and accurate automati... [more] | OCS2009-102 pp.13-17 |
| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-27 10:25 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Effective Hardware Task Context Switching in Virtex-4 FPGAs Krzysztof Jozwik, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada (Nagoya Univ.) VLD2009-87 CPSY2009-69 RECONF2009-72 |
A unique aspect of flexibility provided by some of the FPGAs such as Xilinx Virtex-4 family is the capability of dynamic... [more] | VLD2009-87 CPSY2009-69 RECONF2009-72 pp.113-118 |
| MSS | 2010-01-21 15:50 |
Aichi | Toyota Central R&D Labs. | Approximate Solution Based on the Dynamic Programming for Optimal Configuration Problem of the Multiversion Tasks Sayuri Terada, Toshimitsu Ushio (Osaka Univ.) CST2009-42 |
In embedded control systems, the computational delay and the jitter of each job released by a task influence systems' pe... [more] | CST2009-42 pp.31-36 |
| SR | 2010-01-21 13:50 |
Tokyo | Univ. of Electro-Communications | Impact of Receiver's Physical Configuration on White Space Occurrence in Multi-BSS/Multi-Channel Operation of WLAN Kazuto Yano, Makoto Taromaru, Masazumi Ueba (ATR) SR2009-80 |
Recently, dynamic spectrum access (DSA) system, which performs wireless communication over radio resources temporally-un... [more] | SR2009-80 pp.39-46 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-04 13:25 |
Kochi | Kochi City Culture-Plaza | [Invited Talk]
A Project on Dynamically Reconfigurable Processors: MuCCRA
-- Design emvironment, Low Power design and 3D wireless interconnect -- Hideharu Amano (Keio Univ.) RECONF2009-51 |
Dynamically reconfigurable processor project MuCCRA(Multi-Core Configurable Reconfigurable Architecture) aims to establ... [more] |
RECONF2009-51 pp.61-66 |
| RECONF | 2009-09-17 16:40 |
Tochigi | Utsunomiya Univ. | [Invited Talk]
YAWARA: A Self-Optimizing Computer System Project Takanobu Baba, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.) RECONF2009-27 |
The YAWARA project aims at an extreme optimization system that reconfigures both hardware and software at run-time. This... [more] | RECONF2009-27 pp.49-54 |
| RECONF | 2009-05-15 12:40 |
Fukui | * Hiroyuki Kawai, Yoshiki Yamaguchi, Moritoshi Yasunaga (Tsukuba Univ.) RECONF2009-13 |
In this paper, we extend DDI (Direct Data Implementation), that is pattern data are directly transformed into logic circ... [more] | RECONF2009-13 pp.73-78 |
|
| VLD, CPSY, RECONF, IPSJ-SLDM | 2009-01-29 08:40 |
Kanagawa | Implementation of Dynamically Reconfigurable Processor MuCCRA-3 and Methods for Reconfiguration Overhead Reduction Toru Sano, Hideharu Amano (Keio Univ) VLD2008-91 CPSY2008-53 RECONF2008-55 |
We have developed and evaluated MuCCRA-1 and 2 in order to analyze architectural trade-off in dynamically reconfigurab... [more] |
VLD2008-91 CPSY2008-53 RECONF2008-55 pp.1-6 |
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