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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
VLD, HWS, ICD |
2024-03-01 10:10 |
Okinawa |
(Primary: On-site, Secondary: Online) |
Fault Detectable Convolutional Neural Network Circuits With Dual Modular Redundancy Based on Mixed-precision Quantization Yamato Saikawa, Yuta Owada, Yoichi Tomioka, Hiroshi Saito, Yukihide Kohira (UoA) VLD2023-122 HWS2023-82 ICD2023-111 |
In safety-critical edge AI systems, circuit failures caused by aging or cosmic ray can lead to serious accidents. Dual M... [more] |
VLD2023-122 HWS2023-82 ICD2023-111 pp.119-124 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2012-11-27 09:50 |
Fukuoka |
Centennial Hall Kyushu University School of Medicine |
Network Performance of Multifunction On-chip Router Architectures Shinya Takamaeda-Yamazaki, Naoki Fujieda, Kenji Kise (Tokyo Inst. of Tech.) CPSY2012-52 |
In order to improve the chip-level dependability, we have proposed SmartCore system, NoC-based DMR (Dual Modular Redunda... [more] |
CPSY2012-52 pp.27-32 |
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