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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM, EID 2014-12-12
16:45
Kyoto Kyoto University Temperature Dependence of Current Gain in 4H-SiC BJTs
Satoshi Asada, Takafumi Okuda, Tsunenobu Kimoto, Jun Suda (Kyoto Univ.) EID2014-35 SDM2014-130
Temperature dependence of current gain from 140 to 460 K in a 4H-SiC bipolar junction transistor (SiC BJT) was investiga... [more] EID2014-35 SDM2014-130
pp.115-118
SDM, ED
(Workshop)
2012-06-27
14:30
Okinawa Okinawa Seinen-kaikan A Novel CMOS-Based PNP BJT Structure for Analog Applications
Seon-Man Hwang, Yi-Jung Jung, Hyuk-Min Kwon, Jae-Hyung Jang, Ho-Young Kwak, Sung-Kyu Kwon (Chungnam National Univ.), Yi-Sun Chung, Da-Soon Lee, Jong-Kon Lee (Magnachip Semiconductor Inc.), Hi-Deok Lee (Chungnam National Univ.)
In this paper, a novel pnp bipolar junction transistor (BJT) structure based on CMOS technology is proposed to improve t... [more]
EMT, OPE, MW, IEE-EMT [detail] 2010-07-30
10:50
Hokkaido Hokkaido Univ. Gain and Bandwidth Tunable Multi-Band Differential Amplifiers
Yasushi Itoh, Kazuyoshi Sakamoto, Wei Cao, Keita Sakurai, Toshihiko Murata (Shonan Inst. of Tech.) MW2010-60 OPE2010-45
An L-band gain and bandwidth tunable low-noise differential amplifier has been developed for the next generation reconfi... [more] MW2010-60 OPE2010-45
pp.193-197
SIP, CAS, VLD 2009-07-02
13:50
Hokkaido Kushiko-shi Shogai Gakushu Center Measured Data Evaluations for Both Behaviors of MOSFET and Lateral BJT Based on High Breakdown Voltage SOI-CMOS Process using Asymmetric LDD structure
Takashi Hamahata (Kinki Univ.), Toshiaki Koike-Akino (Harvard Univ.), Toshiro Akino, T. Goji Etoh (Kinki Univ.) CAS2009-19 VLD2009-24 SIP2009-36
This paper describes that, being based on 0.6um SOI-CMOS process of X-FAB having an MOSFET structure with a high breakdo... [more] CAS2009-19 VLD2009-24 SIP2009-36
pp.103-108
VLD, CAS, SIP 2008-06-26
15:45
Hokkaido Hokkaido Univ. A Lateral Unified-CBiCMOS Buffer Circuit for High Speed and Low Energy Based on 0.18μm CMOS/SOI Process
Takashi Hamahata, Satoshi Uto, Toshiro Akino (Kinki Univ.), Kenji Nishi (Kinki Univ. Tech of Collage), Kousei Takehara, Takeharu Etoh (Kinki Univ.) CAS2008-16 VLD2008-29 SIP2008-50
In this paper, we develop a printed circuit board having a discrete device that can drive a CCD chip with 5 nF maximum l... [more] CAS2008-16 VLD2008-29 SIP2008-50
pp.87-92
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