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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
AP
(2nd)
2016-02-29
17:00
Overseas Telecommunications University, Nha Trang, Vietnam An ASIC Implementation of Hardware Logarithm Generator for Digital Signal Processing in Communication Systems
Van-Thuan Sai, Van-Phuc Hoang (LQDTU)
In this paper, we present an efficient hardware approximation for the binary logarithm function which is highly required... [more]
SR 2013-10-24
13:00
Osaka Osaka Univ. [Technology Exhibit] Radio Receiver Front-End Using Time-Based ADC
Tomohito Terasawa, Yuji Kamiya, Hiroyuki Kawashima, Kenichirou Imai, Masanobu Suzuki, Takamoto Watanabe, Nobuyuki Taguchi, Manabu Sawada (DENSO), Hou Yu, Yoshiyuki Hirooka, Ninh Hong Phuc, Masaya Miyahara, Akira Matsuzawa (Tokyo Inst. of Tech.) SR2013-62
A direct-conversion RF-receiver implemented in 65nm CMOS which has RF front-end and Time-Based analog-to-digital convert... [more] SR2013-62
pp.49-54
ICD 2007-04-13
09:40
Oita   [Invited Talk] A 65 nm Embedded SRAM with Wafer Level Burn-In Mode, Leak-Bit Redundancy and E-trim Fuse for Known Good Die
Shigeki Ohbayashi, Makoto Yabuuchi, Kazushi Kono (Renesas Technology), Yuji Oda (Shikino High-Tech), Susumu Imaoka (Renesas Design), Keiichi Usui (Daioh Electric), Toshiaki Yonezu, Takeshi Iwamoto, Koji Nii, Yasumasa Tsukamoto, Masashi Arakawa, Takahiro Uchida, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara (Renesas Technology) ICD2007-11
We propose a Wafer Level Burn-In (WLBI) mode, a leak-bit redundancy and a small, highly reliable Cu E-trim fuse repair s... [more] ICD2007-11
pp.59-64
ICD, SDM 2006-08-18
12:05
Hokkaido Hokkaido University A 65 nm Ultra-High-Density Dual-port SRAM with 0.71um2 8T-cell for SoC
Susumu Imaoka (Renesas Design), Koji Nii (Renesas Technology), Yasuhiro Masuda (Renesas Design), Makoto Yabuuchi, Yasumasa Tsukamoto, Shigeki Ohbayashi, Motoshige Igarashi, Kazuo Tomita, Nobuo Tsuboi, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara (Renesas Technology)
We propose a new access scheme of synchronous dual-port (DP) SRAM that minimizes area of 8T-DP-cell and keeps cell stabi... [more] SDM2006-148 ICD2006-102
pp.133-136
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