Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
RCS, SR, SRW (Joint) |
2024-03-13 10:25 |
Tokyo |
The University of Tokyo (Hongo Campus), and online (Primary: On-site, Secondary: Online) |
[Short Paper]
A Study on the use of Advanced Cryptography in Sensor Network Takuya Kurihara, Keiichiro Mori, Kazuto Yano, Toshikazu Sakano (ATR) SR2023-87 |
Post-quantum cryptography (PQC) is a technology necessary to ensure security in the era of quantum computers. However, P... [more] |
SR2023-87 pp.1-3 |
EMM, BioX, ISEC, SITE, ICSS, HWS, IPSJ-CSEC, IPSJ-SPT [detail] |
2023-07-25 11:20 |
Hokkaido |
Hokkaido Jichiro Kaikan |
Secure Cryptographic Unit with built-in Signature Generation Hardware for Aggregate Signature Schemes and its FPGA Implementation Toshihiro Sato, Shohei Kawasaki (SCU), Kaoru Masada (Tokyo Univ.), Riku Anzai, Junichi Sakamoto, Naoki Yoshida (YNU), Yasuyoshi Uemura (SCU), Makoto Ikeda (Tokyo Univ.), Tsutomu Matsumoto (YNU) ISEC2023-42 SITE2023-36 BioX2023-45 HWS2023-42 ICSS2023-39 EMM2023-42 |
Secure Cryptographic Unit (SCU) consists of a hardware cryptographic engine and an access control mechanism for the engi... [more] |
ISEC2023-42 SITE2023-36 BioX2023-45 HWS2023-42 ICSS2023-39 EMM2023-42 pp.182-187 |
HWS, VLD |
2023-03-04 11:55 |
Okinawa |
(Primary: On-site, Secondary: Online) |
Cloud Based Evaluation of Communication Bandwidth and Tracking Time of Traceable Aggregate Signature Protocols Koudai Aoyama, Riku Anzai, Junichi Sakamoto, Naoki Yoshida, Tsutomu Matsumoto (Yokohama National Univ.) VLD2022-119 HWS2022-90 |
Traceable Aggregate Signature is a scheme that has the ability to identify the source of an illegal signature if it is i... [more] |
VLD2022-119 HWS2022-90 pp.257-260 |
HWS, ICD |
2022-10-25 15:15 |
Shiga |
(Primary: On-site, Secondary: Online) |
A Memory-Saving Software Implementation of Pairing Computation on the GMT8-544 Curve Hiroto Miyata, Junichi Sakamoto, Naoki Yoshida, Riku Anzai, Tsutomu Matsumoto (YNU) HWS2022-39 ICD2022-31 |
There has been a lot of research on increasing the security of IoT, and encryption is one of the methods. Pairing crypto... [more] |
HWS2022-39 ICD2022-31 pp.52-57 |
BioX, ISEC, SITE, ICSS, EMM, HWS, IPSJ-CSEC, IPSJ-SPT [detail] |
2021-07-19 13:55 |
Online |
Online |
Memory-saving implementation of BLS12-381 Pairing-based cryptography Riku Anzai, Junichi Sakamoto, Zihao Song, Naoki Yoshida, Tsutomu Matsumoto (YNU) ISEC2021-11 SITE2021-5 BioX2021-12 HWS2021-11 ICSS2021-16 EMM2021-16 |
For smart security management of IoT systems, it is expected to utilize advanced cryptography such as identity-based enc... [more] |
ISEC2021-11 SITE2021-5 BioX2021-12 HWS2021-11 ICSS2021-16 EMM2021-16 pp.8-13 |
NS, ICM, CQ, NV (Joint) |
2020-11-26 15:25 |
Online |
Online |
[Invited Talk]
Development of the Edge Computing Platform with Dynamic Modular Architecture and its Application of Cryptography with Advanced Functionality Hidenobu Watanabe, Tohru Kondo (Hiroshima Univ.), Toshihiro Ohigashi (Tokai Univ.) NS2020-75 CQ2020-47 ICM2020-26 |
We have developed an edge computing platform that can coordinate with each computing resources of device , edge and clou... [more] |
NS2020-75 CQ2020-47 ICM2020-26 pp.4-8(NS), pp.4-8(CQ), pp.38-42(ICM) |
ICD, HWS [detail] |
2020-10-26 09:25 |
Online |
Online |
Power Analysis Attack Using Pipeline Scheduling on Pairing Hardware Mitsufumi Yamazaki, Junichi Sakamoto, Tsutomu Matsumoto (YNU) HWS2020-26 ICD2020-15 |
To reduce the latency of pairing calculation for advanced cryptography, hardware implementations with pipelined modular ... [more] |
HWS2020-26 ICD2020-15 pp.7-12 |
ISEC, SITE, ICSS, EMM, HWS, BioX, IPSJ-CSEC, IPSJ-SPT [detail] |
2019-07-23 14:25 |
Kochi |
Kochi University of Technology |
Side Channel Security of an FPGA Pairing Implementation with Pipelined Modular Multiplier Mitsufumi Yamazaki, Junichi Sakamoto, Yuta Okuaki, Tsutomu Matsumoto (YNU) ISEC2019-29 SITE2019-23 BioX2019-21 HWS2019-24 ICSS2019-27 EMM2019-32 |
Since bilinear pairing is useful in realizing advanced cryptography, side channel security evaluation of its high-speed ... [more] |
ISEC2019-29 SITE2019-23 BioX2019-21 HWS2019-24 ICSS2019-27 EMM2019-32 pp.151-156 |
SITE, EMM, ISEC, ICSS, IPSJ-CSEC, IPSJ-SPT [detail] |
2017-07-14 10:40 |
Tokyo |
|
Identifying bottlenecks on social implementation of advanced cryptography Hiroki Kunii, Hiroyuki Date (SECOM) ISEC2017-17 SITE2017-9 ICSS2017-16 EMM2017-20 |
Advanced cryptography is expected as next-generation cryptosystems and has been investigated by many researchers. In thi... [more] |
ISEC2017-17 SITE2017-9 ICSS2017-16 EMM2017-20 pp.39-44 |
SITE, EMM, ISEC, ICSS, IPSJ-CSEC, IPSJ-SPT [detail] |
2017-07-15 14:15 |
Tokyo |
|
Zynq-based Coprocessor Development Environment for Cryptography with Advanced Functionality and Its Evaluation Takanori Miyoshi, Tsutomu Matsumoto (YNU) ISEC2017-37 SITE2017-29 ICSS2017-36 EMM2017-40 |
Bilinear pairing has a potential to produce a lot of new cryptographic protocols enabling advanced functionalities such ... [more] |
ISEC2017-37 SITE2017-29 ICSS2017-36 EMM2017-40 pp.275-280 |