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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, HWS | 2023-10-31 15:00 |
Mie | (Primary: On-site, Secondary: Online) |
Side-Channel Leakage Evaluation of 3D CMOS Chip Stacking Kazuki Monta, Rikuu Hasegawa, Takuji Miki, Makoto Nagata (Kobe Univ.)  HWS2023-57 ICD2023-36 |
2.5D and 3D packaging are methodologies that include multiple integrated circuit (IC) chips. They deliver enhanced perfo... [more] | HWS2023-57 ICD2023-36 pp.16-19 |
| EE, WPT (Joint) |
2023-10-05 11:30 |
Osaka | (Primary: On-site, Secondary: Online) |
Leakage of electromagnetic noise caused by deteriorated capacitors Fumihiko Ishiyama (NTT) EE2023-18 |
We are investigating countermeasure technique against electro-magnetic noise by investigating our own method. We applied... [more] | EE2023-18 pp.7-10 |
| HWS, VLD | 2023-03-04 13:55 |
Okinawa | (Primary: On-site, Secondary: Online) |
* Masaru Mashiba, Kazuki Monta (Kobe Univ.), Takaaki Okidono (SCU), Takuzi Miki, Nagata Makoto (Kobe Univ.) VLD2022-121 HWS2022-92 |
With the development of IoT, security is becoming increasingly important. Confidential information and other information... [more] | VLD2022-121 HWS2022-92 pp.267-272 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2022-11-29 15:05 |
Kumamoto | (Primary: On-site, Secondary: Online) |
Evaluation of power delivery networks in secure semiconductor systems Masaru Mashiba, Kazuki Monta (Kobe Univ.), Takaaki Okidono (SCU), Takuzi Miki, Makoto Nagata (Kobe Univ.) VLD2022-33 ICD2022-50 DC2022-49 RECONF2022-56 |
With the development of the IoT, hardware security is becoming increasingly important. Physical attacks on cryptoprocess... [more] | VLD2022-33 ICD2022-50 DC2022-49 RECONF2022-56 pp.82-86 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 14:20 |
Online | Online | A Dual-mode SAR ADC to Detect Power Analysis Attack Takuya Wadatsumi, Takuji Miki, Makoto Nagata (Kobe Univ.) VLD2021-30 ICD2021-40 DC2021-36 RECONF2021-38 |
Distributed IoT devices are exposed to unexpected interferences by physical accesses by malicious attackers. An on-chip ... [more] | VLD2021-30 ICD2021-40 DC2021-36 RECONF2021-38 pp.78-82 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 14:45 |
Online | Online | Diagnosis of Switching-Induced IR Drop by On-Chip Voltage Monitors Kazuki (Kobe Univ.), Leonidas Kataselas (Aristotle Univ.), Ferenc Fodor (IMEC), Alkis Hatzopoulos (Aristotle Univ.), Makoto Nagata (Kobe Univ.), Erik Jan Marinissen (IMEC) VLD2021-31 ICD2021-41 DC2021-37 RECONF2021-39 |
On-chip monitor (OCM) circuits enable us to observe dynamic power-supply (PS) waveforms within power domains individuall... [more] | VLD2021-31 ICD2021-41 DC2021-37 RECONF2021-39 pp.83-86 |
| HWS, ICD [detail] | 2021-10-19 11:15 |
Online | Online | High-Efficiency simulation method for evaluating power noise and side-channel leakage in crypto modules Kazuki Monta, Takuji Miki, Makoto Nagata (Kobe Univ.) HWS2021-44 ICD2021-18 |
In semiconductor integrated circuits of cryptographic modules, the side-channel leakage from power supply noise is criti... [more] | HWS2021-44 ICD2021-18 pp.19-22 |
| SDM | 2021-01-28 14:05 |
Online | Online | [Invited Talk]
Secure 3D CMOS Chip Stacks with Backside Buried Metal Power Delivery Networks for Distributed Decoupling Capacitance Kazuki Monta (Kobe Univ.) SDM2020-51 |
In semiconductor integrated circuits, power signal integrity(PSI) and electromagnetic compatibility caused by power supp... [more] | SDM2020-51 pp.8-12 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-18 14:25 |
Online | Online | On-chip power supply noise monitoring for evaluation of multi-chip board power delivery networks Daichi Nakagawa, Kazuki Yasuda, Masaru Mashiba, Kazuki Monta, Takaaki Okidono, Takuji Miki, Makoto Nagata (Kobe Univ) VLD2020-31 ICD2020-51 DC2020-51 RECONF2020-50 |
In these days, information and communication technology has been evolving more and more, and hardware security has been ... [more] | VLD2020-31 ICD2020-51 DC2020-51 RECONF2020-50 pp.115-117 |
| HWS, VLD [detail] | 2020-03-07 13:25 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Side-channel leakage evaluation of cryptographic module by IC chip level power supply noise simulation Kazuki Yasuda, Kazuki Monta, Akihiro Tsukioka, Noriyuki Miura, Makoto Nagata (Kobe Univ), Karthik Srinivasan, Shan Wan, Lagn Lin, Ying-Shiun Li, Norman Chang (ANSYS) VLD2019-142 HWS2019-115 |
In this research, we focused on power supply noise as one of the observed side channel information leakage in cryptograp... [more] | VLD2019-142 HWS2019-115 pp.279-282 |
| SDM, ICD, ITE-IST [detail] | 2019-08-09 12:00 |
Hokkaido | Hokkaido Univ., Graduate School /Faculty of Information Science and | Evaluation of IC-Chip Noise Reduction using Magnetic Materials Kosuke Jike, Koh Watanabe, Satoshi Tanaka, Noriyuki Miura, Makoto Nagata (Kobe Univ), Akihiro Takahashi, Yasunori Miyazawa, Masahiro Yamaguchi (Tohoku Univ) SDM2019-49 ICD2019-14 |
Suppression of noise emitted from digital integrated circuit (IC) chip is expected by using magnetic materials. The freq... [more] | SDM2019-49 ICD2019-14 pp.79-83 |
| ISEC, SITE, ICSS, EMM, HWS, BioX, IPSJ-CSEC, IPSJ-SPT [detail] | 2019-07-23 13:35 |
Kochi | Kochi University of Technology | Side-channel leakage evaluation of cryptographic module by IC chip level consumption simulation Kazuki Yasuda, Kazuki Monta, Akihiro Tsukioka, Noriyuki Miura, Makoto Nagata (Kobe Univ.) ISEC2019-27 SITE2019-21 BioX2019-19 HWS2019-22 ICSS2019-25 EMM2019-30 |
With the development of the information society, side-channel information leakage due to power supply noise in a cryptog... [more] | ISEC2019-27 SITE2019-21 BioX2019-19 HWS2019-22 ICSS2019-25 EMM2019-30 pp.139-143 |
| DC | 2019-02-27 15:35 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Improvement of Flip-Flop Performance Considering the Influence of Power Supply Noise Yuya Kinoshita, Yukiya Miura (Tokyo Metropolitan Univ.) DC2018-82 |
With the scaling down and low-power operation of VLSI circuits, influence on circuit behavior by power supply noise such... [more] | DC2018-82 pp.67-72 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-07 14:35 |
Hiroshima | Satellite Campus Hiroshima | Analysis of Conductive Power Noise Characteristics in Digital IC Chips between two Different IC Packaging Structures Akihiro Tsukioka, Kosuke Jike, Koh Watanabe, Noriyuki Miura, Makoto Nagata (Kobe Univ.) CPM2018-96 ICD2018-57 IE2018-75 |
The conducted and radiated emission are caused by the dynamic power consumption in digital circuit operations. The chara... [more] | CPM2018-96 ICD2018-57 IE2018-75 pp.37-42 |
| SDM, ICD, ITE-IST [detail] | 2018-08-08 12:50 |
Hokkaido | Hokkaido Univ., Graduate School of IST M Bldg., M151 | Measurements and Analysis of Power Supply Noise in Digital IC Chip Kosuke Jike, Akihiro Tsukioka, Ryohei Sawada, Koh Watanabe, Noriyuki Miura, Makoto Nagata (Kobe Univ) SDM2018-39 ICD2018-26 |
Dynamic power noise can be the root cause of electromagnetic compatibility (EMC) problems of electromagnetic interferenc... [more] | SDM2018-39 ICD2018-26 pp.77-82 |
| DC | 2018-02-20 16:35 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Influence on Flip-Flop Behaviors by Power Supply Noise and Proposal of their Countermeasures Miyuki Inoue, Yukiya Miura (Tokyo Metropolitan Univ.) DC2017-88 |
With the scaling down and low power operation of VLSI circuits, effects on circuit behavior by power supply noise such a... [more] | DC2017-88 pp.67-72 |
| EMCJ | 2017-04-14 14:30 |
Tokyo | NTT Musashino R&D Center | Method of transient signal analysis and its application to switching noise Fumihiko Ishiyama, Farhan Mahmood, Yuichiro Okugawa, Yoshiharu Akiyama (NTT) EMCJ2017-2 |
We are investigating methods of characterizing electric noise to identify the source of the electric noise. For the purp... [more] | EMCJ2017-2 pp.7-12 |
| DC | 2016-02-17 16:05 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Study on the Effect of Power Supply Noise on Flip-Flop Circuits Takuya Yamamoto, Yukiya Miura (Tokyo Metropolitan Univ.) DC2015-96 |
According to the scaling down, and lower power design of VLSI circuits, power supply noise such as IR-drop affects the o... [more] | DC2015-96 pp.61-66 |
| ICD | 2010-12-16 13:00 |
Tokyo | RCAST, Univ. of Tokyo | [Invited Talk]
Measurement and Characteristics Validation of On-chip Signal and Power Noise
-- Looking back on my doctoral course -- Yasuhiro Ogasahara (Renesas Electronics Corp.) ICD2010-98 |
This paper describes measurement results of inductive coupling effect on timing, and validation of interconnect model. T... [more] | ICD2010-98 pp.19-24 |
| ICD | 2010-12-16 15:10 |
Tokyo | RCAST, Univ. of Tokyo | [Poster Presentation]
Evaluation of Power Gating Structures Focusing on Power Supply Noise with Measurement and Simulation Yasumichi Takai, Masanori Hashimoto, Takao Onoye (Osaka Univ.) ICD2010-109 |
This paper investigates the impact of power gating structure on power supply noise using 65nm test chip measurement and ... [more] | ICD2010-109 pp.75-80 |
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