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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| HWS, VLD [detail] | 2020-03-04 13:50 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Standard Cell Library of Stack Structured Cells to Reduce LSI Maximum Power Consumption Yuki Imai (Saitama Univ.), Shinichi Nishizawa (Fukuoka Univ.), Kazuhito Ito (Saitama Univ.)  VLD2019-101 HWS2019-74 |
Energy harvesting elements such as solar cells used as power sources for IoT devices have large internal resistance, and... [more] | VLD2019-101 HWS2019-74 pp.43-48 |
| HWS, VLD [detail] | 2020-03-04 14:55 |
Okinawa | Okinawa Ken Seinen Kaikan (Cancelled but technical report was issued) |
Gate Sizing for Programmable Delay Elements on Post-Silicon Delay Tuning Kota Muroi, Yukihide Kohira (UoA) VLD2019-103 HWS2019-76 |
Due to progressing process technology, yield of chips is reduced by timing violation caused by delay variation of gates ... [more] | VLD2019-103 HWS2019-76 pp.53-58 |
| IN, NS (Joint) |
2019-03-05 09:20 |
Okinawa | Okinawa Convention Center | Transmission controlling Method based on Remaining Battery for Delay Tolerant Networking Yoshitaka Koitabashi, Yuki Inoue, Syota Uchiyama, Osamu Mizuno (Kogakuin Univ) IN2018-106 |
Delay Tolerant Networking(DTN) has proposed as a communication method using only mobile terminals．Since existing routing... [more] | IN2018-106 pp.133-138 |
| VLD, HWS (Joint) |
2018-03-01 09:50 |
Okinawa | Okinawa Seinen Kaikan | Clustering for Reduction of Power Consumption and Area on Post-Silicon Delay Tuning Kota Muroi, Yukihide Kohira (Univ. of Aizu) VLD2017-107 |
Due to progressing process technology, yield of chips is reduced by timing violation caused by delay variation of gates ... [more] | VLD2017-107 pp.109-114 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2017-03-09 16:10 |
Okinawa | Kumejima Island | Power Reduction for Pipelined CGRA with the Controlling Variable Pipeline and the Body Bias Voltage Takuya Kojima, Naoki Ando, Yusuke Matsushita, Hayate Okuhara, Hideharu Amano (Keio Univ.) CPSY2016-140 DC2016-86 |
(To be available after the conference date) [more] | CPSY2016-140 DC2016-86 pp.51-56 |
| VLD | 2017-03-01 14:50 |
Okinawa | Okinawa Seinen Kaikan | Post-Silicon Delay Tuning Method for Power Reduction considering Yield Improvement Hayato Mashiko, Yukihide Kohira (Univ. of Aizu) VLD2016-104 |
Due to the progress of the process technology in LSI, the yield of chips is reduced by the timing violation because of t... [more] | VLD2016-104 pp.13-18 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-30 10:55 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | A Power-saving Method for Real-time HEVC Encoder LSIs Takayuki Onishi, Yuya Omori, Hiroe Iwasaki, Atsushi Shimizu (NTT) CPM2016-83 ICD2016-44 IE2016-78 |
With the rapid progress of ultra-high definition videos represented by the 4K / 8K UHDTV and of complex video compressio... [more] | CPM2016-83 ICD2016-44 IE2016-78 pp.33-38 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2016-08-10 11:15 |
Nagano | Kissei-Bunka-Hall (Matsumoto) | An Impact of In-Network Caching on Energy Saving for ISP Networks Kota Nojima, Takayuki Shiroma, Takuma Nakajima, Masato Yoshimi, Celimuge Wu, Tsutomu Yoshinaga (UEC) CPSY2016-33 |
Internet traffic is increasing year by year, and is expected to be double of that of 2016 in 2020. It is also estimated ... [more] | CPSY2016-33 pp.223-228 |
| NS, IN (Joint) |
2016-03-04 11:40 |
Miyazaki | Phoenix Seagaia Resort | GA-based task assignment and air conditioner setting for reducing data center power consumption. Takaaki Deguchi (Osaka Univ.), Koji Suganuma (NAIST), Yuya Tarutani, Go Hasegawa, Yutaka Nakamura (Osaka Univ.), Takumi Tamura, Kazuhiro Matsuda (NTT-AT), Morito Matsuoka (Osaka Univ.) NS2015-219 |
In this report, we propose a data center energy management architecture focusing on coordinated operation among various ... [more] | NS2015-219 pp.297-302 |
| RECONF | 2015-06-20 14:00 |
Kyoto | Kyoto University | On the Evaluation Board AISTino equipped with the Fourth Flex Power FPGA chip with SOTB transistors Hanpei Koike, Masakazu Hioki, Yasuhiro Ogasahara (AIST), Hayato Ishigaki, Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa (AIST) RECONF2015-22 |
Flex Power FPGA utilizes threshold voltage programmability to reduce its static power by the body bias control of circui... [more] | RECONF2015-22 pp.119-124 |
| NS, IN (Joint) |
2015-03-02 09:50 |
Okinawa | Okinawa Convention Center | A network model for prediction of temperature distribution in data center Shinya Tashiro, Yuya Tarutani, Go Hasegawa, Yutaka Nakamura (Osaka Univ.), Kazuhiro Matsuda (NTT - AT), Morito Matsuoka (Osaka Univ.) NS2014-190 |
In this report, we propose a network model for real-time prediction of temperature distribution in data center required ... [more] | NS2014-190 pp.81-86 |
| NS, IN (Joint) |
2015-03-02 10:10 |
Okinawa | Okinawa Convention Center | Temperature prediction for energy optimization in data centers by machine learning approaches Kazuyuki Hashimoto, Yuya Tarutani, Go Hasegawa (Osaka Univ.), Kazuhiro Matsuda, Takumi Tamura (NTT-AT), Yutaka Nakamura, Morito Matsuoka (Osaka Univ.) NS2014-191 |
In this report, we propose a temperature prediction method for energy optimization in data centers by machine learning a... [more] | NS2014-191 pp.87-92 |
| ICD | 2014-04-18 11:20 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | [Invited Lecture]
A 27% Active and 85% Standby Power Reduction in Dual-Power-Supply SRAM Using BL Power Calculator and Digitally Controllable Retention Circuit Keiichi Kushida, Fumihiko Tachibana, Osamu Hirabayashi, Yasuhisa Takeyama, Atsushi Kawasumi, Azuma Suzuki, Yusuke Niki, Miyako Shizuno, Sinichi Sasaki, Tomoaki Yabe, Yasuo Unekawa (Toshiba) ICD2014-13 |
This paper presents a dual-power-supply SRAM that reduces active and stand-by power from room temperature (RT) to high t... [more] | ICD2014-13 pp.65-70 |
| NS, IN (Joint) |
2014-03-06 09:30 |
Miyazaki | Miyazaki Seagia | Performance evaluation of task assignment method for reducing air conditioning power consumption at data centers. Takaaki Deguchi, Yoshiaki Taniguchi, Go Hasegawa, Yutaka Nakamura (Osaka Univ.), Norimichi Ukita (ATR), Kazuhiro Matsuda (NTT-AT), Morito Matsuoka (Osaka Univ.) NS2013-209 |
In this report, we propose a server task assignment method for leveling the temperature distribution of data center serv... [more] | NS2013-209 pp.191-196 |
| IPSJ-SLDM, CPSY, RECONF, VLD [detail] | 2014-01-29 15:15 |
Kanagawa | Hiyoshi Campus, Keio University | A Reduction Method of Writing Operations to Non-volatile Memory by Keeping Data Difference for Low-Power Circuit Design Hiroyuki Shinohara, Masao Yanagisawa, Shinji Kimura (Waseda Univ.) VLD2013-130 CPSY2013-101 RECONF2013-84 |
In order to reduce the power consumption of LSI, unnecessary parts should be powered off with fine granularity, and c... [more] |
VLD2013-130 CPSY2013-101 RECONF2013-84 pp.167-172 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-28 13:45 |
Kagoshima | Evaluation of The First Flex Power FPGA chip with SOTB transistors Chao Ma (AIST/Meiji Univ.), Masakazu Hioki (AIST), Takashi Kawanami (KIT), Yasuhiro Ogasahara, Tadashi Nakagawa, Toshihiro Sekigawa (AIST), Toshiyuki Tsutsumi (AIST/Meiji Univ.), Hanpei Koike (AIST) RECONF2013-53 |
Flex Power FPGA was able to utilize a programmable threshold voltage to each circuit block of the FPGA by using the body... [more] | RECONF2013-53 pp.77-82 |
|
| EE, WPT, IEE-SPC (Joint) [detail] |
2013-07-26 15:25 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Validation of Power-saving by Air-conditioning Control Using Temperature Estimation Method by Multiple Regression Analysis Ryota Nakamura, Hideaki Hashimoto, Akira Takeuchi, Masayuki Nakamura, Joji Urata (NTT) EE2013-18 |
Power consumption in data centers is increasing sharply. Therefore, a strategy that reduces their power consumption is n... [more] | EE2013-18 pp.91-96 |
| ICD | 2013-04-12 14:20 |
Ibaraki | Advanced Industrial Science and Technology (AIST) | [Invited Lecture]
A Power-Reduction Scheme for Dual-Power-Supply SRAM Using BL Power Calculator and Digital LDO Miyako Shizuno, Fumihiko Tachibana, Osamu Hirabayashi, Yasuhisa Takeyama, Atsushi Kawasumi, Keiichi Kushida, Azuma Suzuki, Yusuke Niki, Sinichi Sasaki, Tomoaki Yabe, Yasuo Unekawa (Toshiba) ICD2013-19 |
This paper presents a dual-power-supply SRAM that reduces active and stand-by power from room temperature (RT) to high t... [more] | ICD2013-19 pp.97-102 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB [detail] | 2013-03-14 09:35 |
Nagasaki | A development and evaluation of the normally-off sensor node for low-power operation. Kazuho Nakagawa, Ryohei Hori, Takeshi Kumaki, Masahumi Kimata, Takeshi Fujino (Ritsumeikan Univ.) CPSY2012-87 DC2012-93 |
Recently, various kinds of services such as energy saving and security monitoring were progressed by monitoring temperat... [more] | CPSY2012-87 DC2012-93 pp.211-216 |
|
| AP, RCS (Joint) |
2012-11-15 09:50 |
Tokyo | Tokyo Denki University | A Study on a Periodic Wakeup Protocol for Active Tags Mari Ochiai, Akinori Taira, Fumio Ishizu (Mitsubishi Electric) RCS2012-162 |
Periodic and regular wakeup is a common technique for reducing power consumption in active tag systems. The transmitted ... [more] | RCS2012-162 pp.7-11 |
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