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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| COMP, IPSJ-AL | 2024-05-09 10:45 |
Kyoto | Kyoto University (Rakuyu-kaikan) | Depth-Three Circuits for Inner Product and Majority Functions Kazuyuki Amano (Gunma Univ.) |
(To be available after the conference date) [more] | |
| NLP, MSS | 2024-03-14 16:05 |
Misc. | Kikai-Shinko-Kaikan Bldg. | Functional electrical stimulator with wireless sequential logic central pattern generator model Rikuto Nozu, Hiroyuki Torikai (Hosei Univ)  MSS2023-97 NLP2023-149 |
In this study, we design a functional electrical stimulator using a wireless sequential logic circuit central pattern ge... [more] | MSS2023-97 NLP2023-149 p.123 |
| NLP | 2023-11-29 16:10 |
Okinawa | Nago city commerce and industry association | Stochastic Digital Cochlea Model for Mimicking Fundamental Characteristics of Mammalian Cochlea Sone Koki, Torikai Hiroyuki (Hosei Univ.) NLP2023-81 |
This paper introduces a stochastic digital cochlear model. The study demonstrates that the model is capable of mimicking... [more] | NLP2023-81 p.89 |
| PN | 2023-08-30 11:40 |
Hokkaido | (Primary: On-site, Secondary: Online) |
Reconfigurable All-Optical Logic Gate Using Quantum Dot Semiconductor Optical Amplifiers Taishi Takemoto, Yusuke Hatano, Motoharu Matsuura (UEC) PN2023-35 |
Recently, communication traffic has been increasing year by year, and the delay due to electrical signal processing in o... [more] | PN2023-35 pp.97-100 |
| SCE | 2023-08-08 15:15 |
Kanagawa | Yokohama National Univ. (Primary: On-site, Secondary: Online) |
Design and Implementation of Neuron Circuit Using Adiabatic Quantum-Flux-Parametron Logic Tomoharu Yamauchi, Hao San (Tokyo City Univ.), Naoki Takeuchi (AIST/Yokohama National Univ.), Nobuyuki Yoshikawa (Yokohama National Univ.), Olivia Chen (Tokyo City Univ.) SCE2023-11 |
Adiabatic quantum-flux-parametron (AQFP) logic is a promising technology for future energy-efficient，high performance in... [more] | SCE2023-11 pp.53-57 |
| CCS, NLP | 2023-06-08 15:35 |
Tokyo | Tokyo City Univ. | A place and route method in AQFP circuits using multi-objective optimization Syota Kasai, Hidehiro Nakano (Tokyo City Univ.) NLP2023-18 CCS2023-6 |
In recent years, research has been conducted on AQFP circuits, which are superconducting logic circuits that consume les... [more] | NLP2023-18 CCS2023-6 pp.21-24 |
| SCE | 2023-01-20 13:45 |
Tokyo | Kikai-Shinko-Kaikan Bldg. (Primary: On-site, Secondary: Online) |
Design and Implementation of Power Consumption Reduction Binary Neural Networks Using Adiabatic Quantum-Flux-Parametron Logic Tomoharu Yamauchi, Hao San (Tokyo City Univ.), Nobuyuki Yoshikawa (Yokohama National Univ.), Olivia Chen (Tokyo City Univ.) SCE2022-14 |
Adiabatic quantum-flux-parametron (AQFP) logic is a promising technology for future energy-efficient，high performance in... [more] | SCE2022-14 pp.6-11 |
| SCE | 2023-01-20 14:10 |
Tokyo | Kikai-Shinko-Kaikan Bldg. (Primary: On-site, Secondary: Online) |
Introduction of a fluctuation mechanism of the oscillation frequency of the oscillator-based random number generator using Josephson oscillation Takeshi Onomi (Fukuoka Inst. Tech.) SCE2022-15 |
An oscillator-based true random number generator using superconducting single flux quantum circuits and Josephson oscill... [more] | SCE2022-15 pp.12-16 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM [detail] | 2022-11-30 10:45 |
Kumamoto | (Primary: On-site, Secondary: Online) |
Prototype and evaluation of 4-input variable logic circuit with FGC using neuron CMOS inverter Shoma Ito, Daishi Nishiguchi, Masaaki Fukuhara (Tokai Univ.) VLD2022-45 ICD2022-62 DC2022-61 RECONF2022-68 |
Logic elements of FPGA generally use Look-Up Table (LUT) circuits, and the most common types of LUT are 4-input and 6-in... [more] | VLD2022-45 ICD2022-62 DC2022-61 RECONF2022-68 pp.150-155 |
| EMD | 2022-03-04 13:45 |
Online | Online | A Study on Sensorless Drive Methods for Brushless DC Motors Yuuki Harigaya, Kiyoshi Yoshida (NIT) EMD2021-17 |
The three-phase brushless DC motor uses a Hall sensor to detect the position of the magnetic poles of the rotor. Howeve... [more] | EMD2021-17 pp.13-18 |
| SCE | 2021-08-06 14:35 |
Online | Online | Study on adiabatic quantum-flux-parametron datapaths with feedback loops adopting delay-line clocking Taiki Yamae (Yokohama Natl. Univ./JSPS Research Fellow), Naoki Takeuchi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2021-4 |
Adiabatic quantum-flux-parametron (AQFP) is a superconductor logic family which can operate with low switching energy. S... [more] | SCE2021-4 pp.14-18 |
| SCE | 2021-01-19 13:05 |
Online | Online | [Invited Talk]
Design of serializer/deserializer circuits for adiabatic quantum-flux-parametron circuits using delay-line clocking Yuki Hironaka, Taiki Yamae, Naoki Takeuchi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2020-17 |
An adiabatic quantum-flux-parametron (AQFP) circuit is an extremely low-power Josephson logic family. A novel clocking s... [more] | SCE2020-17 pp.1-6 |
| SCE | 2021-01-19 13:55 |
Online | Online | Study and evaluation of adiabatic quantum-flux-parametron logic gates using delay-line clocking Taiki Yamae (Yokohama Natl. Univ./JSPS Research Fellow), Naoki Takeuchi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2020-19 |
Adiabatic quantum-flux-parametron (AQFP) is a superconductor logic family, which can operate with low switching energy. ... [more] | SCE2020-19 pp.13-18 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2020-11-17 14:25 |
Online | Online | Variable Ordering for Minimizing Power Consumption of BDD-based Optical Logic Circuits Ryosuke Matsuo, Shin-ichi Minato (Kyoto Univ) VLD2020-24 ICD2020-44 DC2020-44 RECONF2020-43 |
Optical logic circuits based on integrated nanophotonics have attracted significant interest due to their ultra-high-spe... [more] | VLD2020-24 ICD2020-44 DC2020-44 RECONF2020-43 pp.78-83 |
| NC, MBE (Joint) |
2020-03-06 15:20 |
Tokyo | University of Electro Communications (Cancelled but technical report was issued) |
Understanding of intelligence formation by logic circuits Shinji Karasawa (former MNCT) NC2019-114 |
The concept of intermittent and instantaneous logic circuits is useful to explain how computer or neural network works. ... [more] | NC2019-114 pp.219-224 |
| SCE | 2019-10-09 16:15 |
Miyagi | Design of High Timing resolution Time-to-Digital Convertor for Time-Resolving Photon Detection System using SNSPD Hiroaki Myoren, Ryotaro Kamiya, Kota Aita, Masato Naruse, Tohru Taino (Saitama Univ.), Lin Kang, Jian Chen, Peiheng Wu (Nanjing Univ.) SCE2019-26 |
Superconducting nanowire single photon detectors (SNSPDs) , those have a low dark count rate characteristics, fast and l... [more] | SCE2019-26 pp.23-26 |
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| SCE | 2019-10-10 10:50 |
Miyagi | Study of method to evaluate energy dissipation of arbitrary adiabatic quantum-flux-parametron logic gates Taiki Yamae, Naoki Takeuchi, Nobuyuki Yoshikawa (Yokohama Natl. Univ.) SCE2019-28 |
Adiabatic quantum-flux-parametron (AQFP) logic is an energy-efficient superconductor logic. It operates with zero static... [more] | SCE2019-28 pp.31-36 |
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| SCE | 2018-10-10 15:00 |
Miyagi | Comparison of photon-number-resolving detectors using superconducting nanowire Hiroaki Myoren, Ryotaro Kamiya, Satoshi Denda, Makoto Terai, Masato Naruse, Tohru Taino (Saitama Univ.), Lin Kang, Jian Chen, Peiheng Wu (Nanjing Univ.) SCE2018-18 |
hoton-number resolving superconducting nanowire single photon detectors have been proposed using parallel and series con... [more] | SCE2018-18 pp.7-12 |
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| SCE | 2018-01-31 14:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Investigation on Low-Energy Ferromagnetic Matrix Memory Using Adiabatic Quantum Flux Parametrons Hayato Iwashita, Soya Taniguchi, Haruki Kato, Kyosuke Sano, Masamitsu Tanaka, Akira Fujimaki (Nagoya Univ.) SCE2017-41 |
We study on matrix memory using patterned ferromagnetic materials for storage elements toward highly energy-efficient co... [more] | SCE2017-41 pp.57-62 |
| OPE | 2017-12-07 09:30 |
Okinawa | Plasmonic halfadder with mode conversion of surface plasmon Tomohiro Hirano, Masashi Ota, Ryo Watanabe, Yuya Ishii, Mitsuo Fukuda (Toyohashi Tech.) OPE2017-89 |
Surface plasmon polaritons (SPPs) can be used as signal carriers in high speed and highly integrated logic gates and we ... [more] | OPE2017-89 pp.1-4 |
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