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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
CAS, SIP, MSS, VLD |
2018-06-15 15:05 |
Hokkaido |
Hokkaido Univ. (Frontier Research in Applied Sciences Build.) |
A Rough Placement Method Using Multi-Objective Genetic Algorithm Shohei Shirageyama, Kunihiro Fujiyoshi (TUAT) CAS2018-29 VLD2018-32 SIP2018-49 MSS2018-29 |
In placement problem of LSI layout design, the main purpose is to minimize the wiring length.
Analytical placement has ... [more] |
CAS2018-29 VLD2018-32 SIP2018-49 MSS2018-29 pp.149-154 |
VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 10:55 |
Osaka |
Ritsumeikan University, Osaka Ibaraki Campus |
Length Difference Minimization with Exchanging Pin Pair for Set Pair Routing Problem Shutaro Hara, Kunihiro Fujiyoshi (TUAT) VLD2016-57 DC2016-51 |
Set pair routing is the problem to minimize the maximum difference of paths(length difference) that one to one connected... [more] |
VLD2016-57 DC2016-51 pp.79-84 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-26 15:35 |
Oita |
B-ConPlaza |
A Method for Total Length and Length Difference Reduction for Set-Pair Routing Yuta Nakatani, Atsushi Takahashi (Titech) VLD2014-87 DC2014-41 |
Set pair routing problem in which connection requirements are given
between a pair of terminals is a routing problem on... [more] |
VLD2014-87 DC2014-41 pp.111-116 |
VLD |
2014-03-04 09:15 |
Okinawa |
Okinawa Seinen Kaikan |
An Enhancement of Length Difference Reduction Algorithm for Set Pair Routing Yusaku Yamamoto, Atsushi Takahashi (Tokyo Inst. of Tech.) VLD2013-142 |
Recent advances in circuit speed force to realize signal propagation delay accurately.
In PCB routing design,
desired... [more] |
VLD2013-142 pp.49-54 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-30 10:05 |
Miyazaki |
NewWelCity Miyazaki |
A length difference reduction algorithm by using flow in set pair routing problem for single layer PCB routing Yusaku Yamamoto, Atsushi Takahashi (Osaka Univ.) VLD2011-87 DC2011-63 |
Recent advances in circuit speed forces to realize signal propagation delay accurately.
In PCB routing design,
desire... [more] |
VLD2011-87 DC2011-63 pp.203-208 |
VLD |
2011-09-26 15:55 |
Fukushima |
University of Aizu |
On set pair routing problem Atsushi Takahashi (Osaka Univ.) VLD2011-44 |
In this manuscript, set pair routing problem in which connection requirements are given between a pair of terminal sets ... [more] |
VLD2011-44 pp.23-28 |
SIP, CAS, VLD |
2009-07-02 13:10 |
Hokkaido |
Kushiko-shi Shogai Gakushu Center |
3D Placement Based on Stable-LSE Masatomo Kuwano, Naoto Funatsu, Yasuhiro Takashima (Univ. of Kitakyushu) CAS2009-17 VLD2009-22 SIP2009-34 |
We propose a 3D analytical placement based on Stable-LSE in order to minimize the total wire-length and the overlap volu... [more] |
CAS2009-17 VLD2009-22 SIP2009-34 pp.91-96 |
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