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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
CAS, NLP |
2016-10-27 15:25 |
Tokyo |
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Self-Calibration and Trigger Circuit for 2-Step SAR TDC Takashi Ida, Yuki Ozawa, Richen Jiang, Haruo Kobayashi (Gunma Univ.), Ryoji Shiota (socionext) CAS2016-48 NLP2016-74 |
This paper presents a 2-step successive-approximation-register time-to-digital converter (SAR TDC) architecture with its... [more] |
CAS2016-48 NLP2016-74 pp.55-60 |
ICD, ITE-IST |
2010-07-22 15:50 |
Osaka |
Josho Gakuen Osaka Center |
[Invited Talk]
A 2.1-to-2.8-GHz Low-Phase-Noise All-Digital Frequency Synthesizer with a Time-Windowed Time-to-Digital Converter Tadashi Maeda, Takashi Tokairin (Renesas Electronics Corporation), Masaki Kitsunezuka (NEC Corp.), Mitsuji Okada (Renesas Electronics Corporation), Muneo Fukaishi (NEC Corp.) ICD2010-29 |
A 2.1-to-2.8-GHz low-power consumption all-digital phase locked loop (ADPLL) with a time-windowed time-to-digital conver... [more] |
ICD2010-29 pp.49-54 |
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