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 Results 1 - 8 of 8  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SCE 2023-08-08
15:15
Kanagawa Yokohama National Univ.
(Primary: On-site, Secondary: Online)
Design and Implementation of Neuron Circuit Using Adiabatic Quantum-Flux-Parametron Logic
Tomoharu Yamauchi, Hao San (Tokyo City Univ.), Naoki Takeuchi (AIST/Yokohama National Univ.), Nobuyuki Yoshikawa (Yokohama National Univ.), Olivia Chen (Tokyo City Univ.) SCE2023-11
Adiabatic quantum-flux-parametron (AQFP) logic is a promising technology for future energy-efficient,high performance in... [more] SCE2023-11
pp.53-57
SCE 2023-01-20
13:45
Tokyo Kikai-Shinko-Kaikan Bldg.
(Primary: On-site, Secondary: Online)
Design and Implementation of Power Consumption Reduction Binary Neural Networks Using Adiabatic Quantum-Flux-Parametron Logic
Tomoharu Yamauchi, Hao San (Tokyo City Univ.), Nobuyuki Yoshikawa (Yokohama National Univ.), Olivia Chen (Tokyo City Univ.) SCE2022-14
Adiabatic quantum-flux-parametron (AQFP) logic is a promising technology for future energy-efficient,high performance in... [more] SCE2022-14
pp.6-11
ICD, CPSY, CAS 2017-12-14
15:10
Okinawa Art Hotel Ishigakijima Evaluation of Variations and Reliabilities of Drowsy Cache Type Adiabatic FinFET SRAM
Tomotaka Tanaka, Yasuhiro Takahashi, Toshikazu Sekine (Gifu Univ.) CAS2017-77 ICD2017-65 CPSY2017-74
This paper inspects the differences of static noise margin of 4 types of SRAM circuits. These circuits are analyzed thre... [more] CAS2017-77 ICD2017-65 CPSY2017-74
pp.71-74
ICD, CPSY, CAS 2017-12-14
15:10
Okinawa Art Hotel Ishigakijima A proposal for Improving Security of Adiabatic Reversible Logic Based on PADDL
Tomotaka Nishiwaki, Yasuhiro Takahashi, Toshikazu Sekine (Gifu Univ.) CAS2017-88 ICD2017-76 CPSY2017-85
An adiabatic logic is one of the low power consumption performance improvement by circuit technology for integrated circ... [more] CAS2017-88 ICD2017-76 CPSY2017-85
pp.113-117
ICD, CPSY, CAS 2017-12-14
15:10
Okinawa Art Hotel Ishigakijima Function Evaluation of Adiabatic FinFET SRAM with Virtual Ground Structure
Rintaro Itoh, Yasuhiro Takahashi, Toshikazu Sekine (Gifu Univ.) CAS2017-89 ICD2017-77 CPSY2017-86
The SRAM discussed in this paper is a 10T-SRAM that reduces the leakage current in hold mode by using the virtual ground... [more] CAS2017-89 ICD2017-77 CPSY2017-86
pp.119-122
EMCJ, IEE-EMC 2014-12-19
16:05
Shizuoka Shizuoka Univ. Security Evaluation of CSSAL Countermeasure against Side-Channel Attacks Using Frequency Spectrum Analysis
Cancio Monteiro, Yasuhiro Takahashi, Toshikazu Sekine (Gifu Univ.) EMCJ2014-82
Information leakage on cryptographic devices are possible because of the correlation between the processed data and its ... [more] EMCJ2014-82
pp.75-80
CAS, NLP 2013-09-27
11:15
Gifu Satellite Campus, Gifu University [Invited Talk] CSSAL: Charge Sharing Symmetric Adiabatic Logic -- Case Study of Logic Circuit Design and Cryptographic Circuit Design --
Yasuhiro Takahashi, Cancio Monteiro, Toshikazu Sekine (Gifu Univ.) CAS2013-49 NLP2013-61
This paper reports basic circuit structures, design examples and applications of adiabatic logic, called charge sharing ... [more] CAS2013-49 NLP2013-61
pp.71-75
CAS, NLP 2013-09-27
13:10
Gifu Satellite Campus, Gifu University Operation Verification of Adiabatic Logic in Subthreshold Region
Kazunari Kato, Yasuhiro Takahashi, Toshikazu Sekine (Gifu Univ) CAS2013-50 NLP2013-62
Our previously proposed ultra low-power sub-threshold adiabatic logic has been a problem that noise margin is reduced, s... [more] CAS2013-50 NLP2013-62
pp.77-82
 Results 1 - 8 of 8  /   
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