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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
IN, NS (Joint) |
2019-03-05 10:00 |
Okinawa |
Okinawa Convention Center |
On Proximity-based Relaxation of Equivalent Piece Exchange between Peers in Tit-for-Tat-based P2P File Distribution Yohei Nishi, Masahiro Sasabe, Shoji Kasahara (NAIST) NS2018-232 |
Periodic update of software is one of preventive measures against malicious attacks.
When the software is used by many... [more] |
NS2018-232 pp.231-236 |
NS, IN (Joint) |
2015-03-02 09:10 |
Okinawa |
Okinawa Convention Center |
ILP Based Design of Large Scale Networks using Network Scale Reduction Algorithm Tomohiko Taira, Taiju Mikoshi, Toyofumi Takenaka (Nihon Univ.) NS2014-184 |
In recent years, multi-layer network (MLN) design methods have attracted great attentions of backbone carriers for their... [more] |
NS2014-184 pp.47-52 |
OCS, PN, NS (Joint) |
2013-06-21 09:50 |
Fukushima |
College of Engineering, Nihon University |
High-Speed Calculation Method for Multi-layer Network Design Problem using Ring Topology Koudai Takahashi, Taiju Mikoshi, Toyofumi Takenaka (Nihon Univ.) NS2013-32 |
In recent years, multi-layer network (MLN) design methods have attracted great attentions of backbone carriers for their... [more] |
NS2013-32 pp.19-24 |
VLD, CPSY, RECONF, DC, IPSJ-SLDM, IPSJ-ARC (Joint) [detail] |
2007-11-20 15:10 |
Fukuoka |
Kitakyushu International Conference Center |
A Method for Optimizing Communication Architecture on Network-on-Chip Considering Chip Size and Wiring Costs Daisuke Hayashi, Wataru Murai (Osaka Univ.), Akio Nakata (Hiroshima City Univ.), Tomoya Kitani, Keiichi Yasumoto (NAIST), Teruo Higashino (Osaka Univ.) CPSY2007-35 |
In this paper, we propose a method for deriving an optimal Network-on-Chip (NoC) communication architecture using intege... [more] |
CPSY2007-35 pp.1-6 |
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