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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| NS | 2010-05-21 10:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Hardware Implementation of Fast Forwarding Engine using Standard Memory and Dedicated Circuit Kazuya Zaitsu (Osaka City Univ.), Koji Yamamoto (Renesas Des.), Yasuto Kuroda, Kazunari Inoue (Renesas Ele.), Shingo Ata, Ikuo Oka (Osaka City Univ.)  NS2010-26 |
Ternary content addressable memory (TCAM) is becoming very popular for designing high-throughput forwarding engines on r... [more] | NS2010-26 pp.59-64 |
| CS, OCS (Joint) |
2010-01-29 11:45 |
Yamaguchi | Kaikyo Messe Shimonoseki | Optical Impedance
-- A Proposal of Optical Network Description based on Scattering Matrix Aiming Seamless Extension form Microwave to Optics -- Takeshi Ozeki, Teruhiko Kudo (Sophia Univ.) OCS2009-112 |
At this time point, when the information revolution has continued for more than a decade, optical communication system a... [more] | OCS2009-112 pp.73-78 |
| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-26 11:15 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Development of Interdisciplinary Research Environment by Collaboration of e-Learning and Remote FPGA Jaeseong Kim, Shingo Yoshizawa, Yusaku Kaneta, Shin-ichi Minato, Hiroki Arimura, Yoshikazu Miyanaga (Hokkaido Univ.) VLD2009-74 CPSY2009-56 RECONF2009-59 |
Field programmable gate array (FPGA) can reconfigure logic circuits after production, which is embedded into electric in... [more] | VLD2009-74 CPSY2009-56 RECONF2009-59 pp.31-34 |
| ICD | 2009-12-15 10:50 |
Shizuoka | Shizuoka University (Hamamatsu) | [Invited Talk]
History and Technology Trends of Si RF Analog LSI Developments
-- Emergence of New-Type Circuit Designers -- Tsuneo Tsukahara (Univ. of Aizu) ICD2009-96 |
The history of silicon RF analog circuits is described, focusing on the development of CMOS RF circuits. Moreover, the e... [more] | ICD2009-96 pp.111-116 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-02 10:20 |
Kochi | Kochi City Culture-Plaza | A Circuit Design Method based on Foreknown Regularity between I/O Jin Sato, Tsugio Nakamura, Hiroshi Kasahara, Narito Fuyutsume (Tokyo Denki Univ.) CPM2009-134 ICD2009-63 |
The paper proposes a method of designing an arithmetic unit based on the regularity of the output depending on input pat... [more] | CPM2009-134 ICD2009-63 pp.1-6 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2009-12-04 10:00 |
Kochi | Kochi City Culture-Plaza | A Logic Simulation Method with Consideration of Delay Time Variation by Crosstalk Masayuki Kobayashi, Wataru Sento, Masahiko Toyonaga, Michiaki Muraoka (Kochi Univ.) VLD2009-58 DC2009-45 |
In this paper, a method which detects timing error points by using the logic simulation with back annotation of delay ti... [more] | VLD2009-58 DC2009-45 pp.119-124 |
| ICD, SDM | 2009-07-16 11:25 |
Tokyo | Tokyo Institute of Technology | Low Energy Building Design in Packet Buffer Architecture with Deterministic Performance Guarantee Kazuya Zaitsu (Osaka City Univ.), Hisashi Iwamoto, Yasuto Kuroda, Yuji Yano (Renesas Technology), Koji Yamamoto (Renesas Design), Kazunari Inoue (Renesas Technology), Shingo Ata, Ikuo Oka (Osaka City Univ.) SDM2009-100 ICD2009-16 |
To design guaranteed high-performance router, it is problem that packet buffer is non-deterministic. We propose Head Buf... [more] | SDM2009-100 ICD2009-16 pp.17-22 |
| ICD | 2008-12-11 11:10 |
Tokyo | Tokyo Inst. Tech., Ohokayama Campus, Kokusa-Kouryu-Kaikan | [Invited Talk]
Recollections of Pleasure and Troubles in Analog Circuit Design Yasuhiro Sugimoto (Chuo Univ.) ICD2008-101 |
This paper describes the author’s experiences of past years in analog circuit design for the encouragement of young engi... [more] | ICD2008-101 pp.7-12 |
| ICD | 2008-12-12 11:00 |
Tokyo | Tokyo Inst. Tech., Ohokayama Campus, Kokusa-Kouryu-Kaikan | [Invited Talk]
For those who wish to be a integrated circuit designer Kenji Taniguchi (Osaka Univ.) ICD2008-120 |
Present-day engineering studies provided at universities and professional continuing education for analog circuit design... [more] | ICD2008-120 pp.91-94 |
| ET | 2008-03-08 14:05 |
Tokushima | Tokushima Univ. | Hands-on study based on self-organizing activities of electronics-circuit building Mariko Yao, Junichi Akita (Kanazawa Univ.) ET2007-91 |
Recently， the students in electronic engineering courses are expected to acquire expert knowledge as well as nurture cre... [more] | ET2007-91 pp.41-46 |
| ET | 2005-03-05 15:50 |
Tokushima | Development of a CPU simulator for study of a logic design using the logic circuit design tool Motohiro Nakaguchi, Seikoh Nishita, Norio Harada (Takushoku Univ.) |
This paper describes a CPU simulator and an exercise class with the simulator and a logic circuit design tool. The goal ... [more] | ET2004-129 pp.159-164 |
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