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All Technical Committee Conferences (All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| NLP | 2009-12-21 16:40 |
Iwate | DC Operating Point Analysis of MOS Transistor Circuits Using the Variable Gain Newton Homotopy Method Yasuhiro Koyama, Mitsuru Tonokura, Kiyotaka Yamamura (Chuo Univ.)  NLP2009-137 |
In the field of circuit simulation, homotopy methods have been studied by many researchers to overcome the convergence p... [more] | NLP2009-137 pp.59-64 |
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| SDM | 2009-11-12 15:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Development of MEMS and Equivalent Circuit Generator Nobuyo Fujiwara, Kazuo Asaumi (Mizuho Information & Research Institute), Tomoyuki Koike (Micromachine Center), Toshiyuki Tsuchiya (Kyoto Univ,), Gen Hashiguchi (Shizuoka Univ.) SDM2009-140 |
In order to improve CMOS-integrated MEMS(micro electromechanical system) devices design efficiency, we developed a desig... [more] | SDM2009-140 pp.29-32 |
| CAS, NLP | 2009-01-22 15:30 |
Miyazaki | An Implementation in to the Circuit Simulation of Implicit Runge-Kutta Methods Yutaka Takakura, Yasuhiko Tohyama, Jun Shirataki, Makiko Okumura (KAIT) CAS2008-77 NLP2008-107 |
This paper describes an implementation method of implicit Runge-Kutta algorithm to the circuit simulation.We propose the... [more] | CAS2008-77 NLP2008-107 pp.75-80 |
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| CAS, NLP | 2009-01-22 15:50 |
Miyazaki | A Variable Time Step Method of Implicit Runge-Kutta Algorithm for Circuit Simulation Yasuhiko Tohyama, Yutaka Takakura, Jun Shirataki, Makiko Okumura (KAIT) CAS2008-78 NLP2008-108 |
This paper describs the algorithm of the variable time step when implicit Runge-Kutta(IRK) methods were applied to the c... [more] | CAS2008-78 NLP2008-108 pp.81-86 |
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| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-18 14:50 |
Fukuoka | Kitakyushu Science and Research Park | [Invited Talk]
LSI,PCB Co-analysis Technology Toshiro Sato (FUJITSU Advanced Technologies Limited) CPM2008-92 ICD2008-91 |
Increase of digital equipment operation frequency and decrease of LSI supply voltage are causing the emerging problem of... [more] | CPM2008-92 ICD2008-91 pp.19-24 |
| DC | 2008-06-20 16:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg | Transistor Aging and Operational Environment of Logic Circuits Masafumi Haraguchi (Kyushu Inst. of Tech.), Yukiya Miura (Tokyo Metropolitan Univ.), Seiji Kajihara, Yasuo Sato, Kohei Miyase, Xiaoqing Wen (Kyushu Inst. of Tech.) DC2008-17 |
With the progress of integrated circuit technology, it is becoming important to consider circuit aging. In this work we ... [more] | DC2008-17 pp.35-40 |
| NLP | 2008-03-27 17:15 |
Hyogo | An Efficient Algorithm for Finding All DC Solutions of Piecewise-Linear Circuits Kiyotaka Yamamura, Mitsuru Tonokura, Wataru Takahashi (Chuo Univ.) NLP2007-166 |
An efficient algorithm is proposed for finding all DC solutions of transistor circuits where characteristics of transist... [more] | NLP2007-166 pp.71-76 |
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| VLD, ICD | 2008-03-06 11:35 |
Okinawa | TiRuRu | A Study for Implementation of High Speed Circuit Simulator by using FPGA Taiki Hashizume, Seiji Minoura, Tadashi Mizutani, Hironobu Ishijima, Shinichi Nishizawa (Ritsumeikan Univ.), Masaya Yoshikawa (Meijo Univ.), Masahiro Fukui (Ritsumeikan Univ.) VLD2007-149 ICD2007-172 |
With recent advanced technology, simulation plays an important role in the design flow. However, the simulation requires... [more] | VLD2007-149 ICD2007-172 pp.31-36 |
| ED, SDM | 2008-01-31 10:50 |
Hokkaido | Analysis on 4RTD Logic Circuits Tomohiko Ebata, Hiroki Okuyama, Takao Waho (Sophia Univ.) ED2007-248 SDM2007-259 |
4RTD logic operation has been analyzed based on a circuit model, circuit simulation, and experiment. First, equations de... [more] | ED2007-248 SDM2007-259 pp.57-62 |
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| CAS, NLP | 2007-10-18 17:00 |
Tokyo | Musashi Institute of Technology | [Tutorial Invited Lecture]
Simulation methods for analog RF circuits design Makiko Okumura (Kanagawa Inst. of Tech.) CAS2007-51 NLP2007-79 |
There are some particular analyses, which are not implemented in a standard circuit simulator, for simulating analog RF ... [more] | CAS2007-51 NLP2007-79 pp.99-104 |
| NLP, CAS | 2006-10-04 14:05 |
Osaka | A SPICE-Oriented Method for Finding DC Operating Points of Nonlinear Circuits Containing Piecewise-Linear Macromodels Wataru Kuroki, Kiyotaka Yamamura (Chuo Univ.) |
Recently, efficient algorithms have been proposed for finding all characteristic curves of one-port piecewise-linear (PW... [more] | CAS2006-25 NLP2006-48 pp.25-30 |
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| NLP | 2006-06-23 11:15 |
Tokyo | Chuo Univ. | An Efficient Algorithm for Finding All DC Solutions of Nonlinear Circuits Koki Suda, Wataru Kuroki, Kiyotaka Yamamura (Chuo Univ.) |
An efficient algorithm is proposed for finding all DC solutions of nonlinear (not piecewise-linear) circuits with mathem... [more] | NLP2006-13 pp.13-18 |
| CAS, NLP | 2005-09-15 13:30 |
Niigata | Nagaoka Univ. of Technology | Implementation of the Variable Gain Newton Homotopy Method on SPICE Using Path Following Circuits Wataru Kuroki, Kiyotaka Yamamura (Chuo Univ.), Yasuaki Inoue (Waseda Univ.) |
Recently, an efficient homotopy method termed the variable gain Newton homotopy (VGNH) method has been proposed for find... [more] | CAS2005-28 NLP2005-41 pp.13-18 |
| NLP | 2005-03-26 11:00 |
Tokyo | Tokyo Univ | An Efficient Homotopy Method for Solving Nonlinear Circuits Kiyotaka Yamamura, Naoki Suzuki, Yu Imai (Chuo Univ.), Yasuaki Inoue (Waseda Univ.) |
Finding DC operating points of nonlinear circuits is an important problem in circuit simulation. The Newton-Raphson met... [more] | NLP2004-128 pp.19-24 |
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