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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| SDM | 2022-11-11 14:00 |
Online | Online | [Invited Talk]
Evaluation and Modeling of Inversion Layer Mobility in Si-face 4H-SiC MOSFETs with Nitrided Gate Oxide Munetaka Noguchi, Hiroshi Watanabe (Mitsubishi Electric Corp.), Koji Kita (Tokyo Univ.), Kazuyasu Nishikawa (Mitsubishi Electric Corp.)  SDM2022-75 |
In this study, the inversion layer mobility of the Si-face 4H-SiC MOSFET with nitrided gate oxide is examined under a wi... [more] | SDM2022-75 pp.50-54 |
| ICD, SDM, ITE-IST [detail] | 2020-08-06 10:15 |
Online | Online | [Invited Talk]
Polarization/charge coupling in Si ferroelectric FET and its impact on memory characteristics Kasidit Toprasertpong, Zaoyang Lin, Tsung-En Lee, Mitsuru Takenaka, Shinichi Takagi (Univ. Tokyo) SDM2020-2 ICD2020-2 |
Ferroelectric FETs, where the ferroelectric material is employed as the MOSFET gate insulator, are different from conven... [more] | SDM2020-2 ICD2020-2 pp.3-7 |
| SDM | 2018-06-25 13:30 |
Aichi | Nagoya Univ. VBL3F | [Invited Lecture]
Inversion channel diamond MOSFET
-- Formation of diamond MOS interface by wet annealing -- Tsubasa Matsumoto (Kanazawa Univ.), Hiromitsu Kato, Toshiharu Makino, Masahiko Ogura, Daisuke Takeuchi (AIST), Takao Inokuma (Kanazawa Univ.), Satoshi Yamasaki (AIST), Norio Tokuda (Kanazawa Univ.) SDM2018-20 |
We fabricated inversion channel diamond MOSFET with normally off characteristics. The diamond MOSFET with the inversion ... [more] | SDM2018-20 pp.19-22 |
| SDM | 2012-11-16 10:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg | An Estimation of the Carrier Mobility Model Influenced by Inversion Charge Confinement for Sub-20nm MOSFETs Masahiro Yamamoto, Akira Hiroki, Jong Chul Yoon (KIT) SDM2012-104 |
An effective mobility model used in the MASTAR program, which has been used to predict the device characteristics in the... [more] | SDM2012-104 pp.25-30 |
| MW, ED | 2011-01-14 10:35 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Boosting of Blocking Voltages in GaN Transistors by Widening Depletion Layer in Si Substrate Hidekazu Umeda, Asamira Suzuki, Yoshiharu Anda, Masahiro Ishida, Tetsuzo Ueda, Tsuyoshi Tanaka, Daisuke Ueda (Panasonic Co.) ED2010-184 MW2010-144 |
We propose a novel structure to boost the breakdown voltages of AlGaN/GaN hetero junction field effect transistors (HFET... [more] | ED2010-184 MW2010-144 pp.51-54 |
| SDM | 2008-06-09 15:50 |
Tokyo | An401・402, Inst. Indus. Sci., The Univ. of Tokyo | HoleSubband Dispersion in Si inversion Layers Sakura N. Takeda, Makoto Morita, Ｔａkuya Ohsugi, Yohei Tanigawa, Hiroshi Daimon (NAIST) SDM2008-44 |
Subband dispersion quantized in Si inversion layer was measured by Angle-resolved photoemission spectroscopy. The dispe... [more] |
SDM2008-44 pp.13-16 |
| SDM | 2008-06-09 16:50 |
Tokyo | An401・402, Inst. Indus. Sci., The Univ. of Tokyo | Inversion-Layer Capacitance and Low-Field Mobility Characteristics in Si(110) pMOSFETs Masumi Saitoh, Shigeki Kobayashi, Ken Uchida (Toshiba) SDM2008-46 |
Basic transport properties of Si (110) pMOSFETs are systematically investigated. Inversion-layer capacitance of (110) p... [more] | SDM2008-46 pp.23-27 |
| ICD | 2005-04-14 16:15 |
Fukuoka | 4Gb Multilevel AG-AND Flash Memory with 10MB/s Programming Throughput Hideaki Kurata, Yoshitaka Sasago, Kazuo Otsuga, Tsuyoshi Arigane, Tetsufumi Kawamura, Takashi Kobayashi, Hitoshi Kume (Hitachi), Kazuki Homma, Kenji Kozakai, Satoshi Noda, Teruhiko Ito, Masahiro Shimizu, Yoshihiro Ikeda, Osamu Tsuchiya, Kazunori Furusawa (RENESAS) |
We fabricated a 4Gb multilevel AG-AND flash memory using 90nm CMOS technology. By using an inversion-layer local-bitline... [more] | ICD2005-11 pp.53-58 |
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