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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| NS, IN (Joint) |
2014-03-07 09:30 |
Miyazaki | Miyazaki Seagia | A study on energy saving for a data center network with opt-electronic packet routers Takamichi Nishijima, Yuki Koizumi, Yuichi Ohsita, Masayuki Murata (Osaka Univ.)  IN2013-179 |
In data center networks, not only high communication performance but energy saving is important. For high communication... [more] | IN2013-179 pp.211-216 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-29 09:20 |
Kagoshima | Design and evaluation of circuits to control scan-in power in logic BIST Takaaki Kato, Takeru Kina, Yousuke Miyake, Yasuo Sato, Seiji Kajihara (Kyushu Inst. of Tech.) VLD2013-93 DC2013-59 |
Power reduction during Logic BIST is a crucial problem; however, power controlling technologies are required as well as ... [more] | VLD2013-93 DC2013-59 pp.233-238 |
|
| SANE | 2013-06-21 10:45 |
Ibaraki | Tsukuba Space Center, JAXA | Prototype Testing of Panel for Power Generator and Microwave Transmitter used in Space Solar Power Systems Nobuo Adachi (ArumoTech), Daisuke Joudoi, Katsumi Makino (JAXA) SANE2013-25 |
We study the panel for power generator and microwave transmitter which mainly constitute the microwave type space solar ... [more] | SANE2013-25 pp.57-61 |
| NS, OCS, PN (Joint) |
2012-06-21 15:45 |
Yamagata | Yamagata Univ. | [Tutorial Invited Lecture]
Optical Technologies for Creating Green Networks Ken-ichi Sato (Nagoya Univ.) NS2012-33 OCS2012-14 PN2012-5 |
Advances in silicon technology are failing to keep up with Internet traffic; this is unfortunate since we can envisage l... [more] | NS2012-33 OCS2012-14 PN2012-5 p.23(NS), p.29(OCS), p.23(PN) |
| VLD | 2012-03-07 13:20 |
Oita | B-con Plaza | Power reduction of memory circuit and DVFS technique in Dynamic Reconfigurable Processor Yuki Hayakawa, Kimiyoshi Usami (Shibaura Institute of Tech.) VLD2011-138 |
This paper describes a DVFS technique to reduce energy dissipation of Dynamically Reconfigurable Processors(DRP). DRP’s ... [more] | VLD2011-138 pp.109-114 |
| DC | 2012-02-13 11:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A method to reduce shift-toggle rate for low power BIST Takaaki Kato, Senling Wang, Kohei Miyase, Yasuo Sato, Seiji Kajihara (KIT) DC2011-80 |
Logic BIST using scan design has a problem with high power dissipation during test. In this work we propose a method tha... [more] | DC2011-80 pp.25-29 |
| VLD | 2011-03-02 13:35 |
Okinawa | Okinawaken-Danjo-Kyodo-Sankaku Center | Energy-Aware Instruction Scheduling for Fine-Grained Power-Gated VLIW Processors with Multi-Cycle Instructions Mitsuya Uchida, Ittetsu Taniguchi, Hiroyuki Tomiyama, Masahiro Fukui (Ritsumeikan Univ.) VLD2010-117 |
Reducing energy consumption is a crucial for the embedded system design, and especially, the leakage energy reduction is... [more] | VLD2010-117 pp.7-12 |
| VLD | 2011-03-03 11:25 |
Okinawa | Okinawaken-Danjo-Kyodo-Sankaku Center | A Low Power Hardware Architecture for Parallel Group Signature Computation Sumio Morioka, Jun Furukawa, Kazue Sako (NEC) VLD2010-128 |
We've investigated architecture of H/W accelerators for parallel group signature computation, which will be used in data... [more] | VLD2010-128 pp.69-74 |
| RECONF, VLD, CPSY, IPSJ-SLDM [detail] | 2011-01-17 14:10 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Power reduction in Dynamically Reconfigurable Processor by Dynamically VDD Switching and a mapping technique to reduce energy overhead Tatsuya Yamamoto (Shibaura Institute), Kazuei Hironaka (Keio Univ.), Yuki Hayakawa (Shibaura Institute), Masayuki Kimura, Hideharu Amano (Keio Univ.), Kimiyoshi Usami (Shibaura Institute) VLD2010-92 CPSY2010-47 RECONF2010-61 |
This paper describes a dynamic VDD switching technique to reduce energy dissipation of Dynamically Reconfigurable Proces... [more] | VLD2010-92 CPSY2010-47 RECONF2010-61 pp.49-54 |
| ICD | 2010-12-16 15:10 |
Tokyo | RCAST, Univ. of Tokyo | [Poster Presentation]
CMOS-Based Nonvolatile Flip-Flop Design and its Application to a Fractional-N PLL Frequency Synthesizer Ge Wang, Jungyu Lee, Shoichi Masui (Tohoku Univ.) ICD2010-100 |
A CMOS-based nonvolatile flip-flop (NV-FF) is proposed and implemented with a 180nm technology without any additional ma... [more] | ICD2010-100 pp.31-36 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-11-30 09:50 |
Fukuoka | Kyushu University | Energy Aware Instruction Scheduling for Fine Grained Power Gated VLIW Processors Ittetsu Taniguchi, Mitsuya Uchida, Hiroyuki Tomiyama, Masahiro Fukui (Ritsumeikan Univ.) VLD2010-65 DC2010-32 |
Reducing energy consumption is a crucial for the embedded system design, and especially, the leakage energy reduction is... [more] | VLD2010-65 DC2010-32 pp.61-66 |
| NS, CS, IN (Joint) |
2010-09-03 14:15 |
Miyagi | Tohoku University | Development of a 5 GHz Band RF-Tag Sensor System for Realtime Positioning and Data Communication with Reducing Power Consumption Hitoshi Kitayoshi, Kunio Sawaya (Tohoku Univ.) CS2010-36 |
A novel semi-passive sensor RF-tags using 5 GHz band for a low power consumption and a long reading range are proposed. ... [more] | CS2010-36 pp.49-54 |
| CS, CQ (Joint) |
2010-04-26 15:25 |
Aomori | Oirase Keiryu Hotel | A Consideration of Control Interface for Energy-efficient 10G-EPON System Takeshi Sakamoto, Jun-ichi Kani, Ryogo Kubo, Hirotaka Ujikawa, Ken-Ichi Suzuki, Naoto Yoshimoto (NTT) CS2010-2 CQ2010-9 |
[more] | CS2010-2 CQ2010-9 pp.7-12(CS), pp.49-54(CQ) |
| MW | 2010-03-05 11:10 |
Kyoto | Ryukoku Univ. | Development of Low Power Ring-Type DCO for multi-standard wireless communication system Satoshi Hamada, Abhishek Tomar, Ramesh Pokharel, Haruichi Kanaya, Keiji Yoshida (Kyushu Univ.) MW2009-204 |
(To be available after the conference date) [more] | MW2009-204 pp.141-146 |
| ICD, ITE-IST | 2009-10-02 16:10 |
Tokyo | CIC Tokyo (Tamachi) | A 58-uW Single-Chip Sensor Node Processor Using Synchronous MAC Protocol Shintaro Izumi, Takashi Takeuchi, Takashi Matsuda, Hyeokjong Lee, Toshihiro Konishi, Koh Tsuruda, Yasuharu Sakai, Hiroshi Kawaguchi, Chikara Ohta, Masahiko Yoshimoto (Kobe Univ.) ICD2009-58 |
In this paper, we propose a single-chip ultra low-power sensor node processor with a synchronous media access control (M... [more] | ICD2009-58 pp.141-145 |
| IN, NS (Joint) |
2009-03-03 11:30 |
Okinawa | Okinawa-Zanpamisaki Royal Hotel | Isochronous MAC Protocol for Low-Power Wireless Sensor Node VLSI Shintaro Izumi, Takashi Matsuda, Takashi Takeuchi, Hiroshi Kawaguchi, Chikara Ohta, Masahiko Yoshimoto (Kobe Univ.) NS2008-174 |
In this paper, we propose the isochronous media access control (I-MAC) processor by cross layer design. The I-MAC can be... [more] | NS2008-174 pp.177-182 |
| ICD, IPSJ-ARC, IPSJ-EMB | 2009-01-14 14:45 |
Osaka | Shoushin Kaikan | A Power Saving Scheme on Multicore Processors Using OSCAR API Ryo Nakagawa, Masayoshi Mase, Jun Shirako, Keiji Kimura, Hironori Kasahara (Waseda Univ.) |
Effective power reduction of an application program on multicore processors requires appropriate power control for each ... [more] | ICD2008-145 pp.93-98 |
| MSS | 2008-08-04 14:15 |
Shizuoka | Shizuoka University (Hamamatsu Campus), Faculty of Engineering | The Resolution of Trade-off between Power Consumption and Task Performance Using Elastic Task Model Sayuri Terada, Toshimitsu Ushio (Osaka Univ.) CST2008-15 |
In computing systems consisting of a CPU with dynamic voltage scaling (DVS), we can reduce their power consumption by se... [more] | CST2008-15 pp.17-22 |
| MSS | 2008-06-02 14:00 |
Aichi | Nagoyo University, Noyori Conference Hall | Resource Allocation with Standby Power for Low Power Consumption and QoS-based Fairness Sayuri Terada, Toshimitsu Ushio (Osaka Univ.) CST2008-3 |
We consider resource allocation problem resolving trade-off between the average CPU power consumption in hyperperiod and... [more] | CST2008-3 pp.13-18 |
| SANE | 2007-11-30 15:20 |
Kanagawa | ISAS,JAXA (Sagamihara) | Development of S-Band Digital Transponder Tomoko Nagae, Hirobumi Saito, Tomoaki Toda, Tomohiko Sakai, Seisuke Fukuda (JAXA), Hideho Tomita, Takahiro Shinke (Addnics) SANE2007-90 |
The more technologies advance, the higher mission achievements are demanded in small satellite missions. Less weight an... [more] | SANE2007-90 pp.47-49 |
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