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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| CPSY | 2017-11-19 15:00 |
Aomori | Aomori Tourist Information Center, ASPAM | [Poster Presentation]
GPU Applications with Single Kernel Synchronization Technique Shunji Funasaka, Koji Nakano, Yasuaki Ito (Hiroshima Univ.)  CPSY2017-56 |
A task array is a 2-dimensional array of tasks with dependency relations. Conventional CUDA implementations repeatedly ... [more] |
CPSY2017-56 pp.33-38 |
| MSS, SS | 2017-01-27 10:00 |
Kyoto | Kyoto Institute of Technology | A Design of Multi-layer Cellular Automata Simulator and Its Application Naoki Kamikawa, Hiroshi Umeo (Osaka Electro-Communication Univ.) MSS2016-69 SS2016-48 |
A model of cellular automata (CA) is considered to be a well-studied non-linear model of complex systems in which an inf... [more] | MSS2016-69 SS2016-48 pp.71-76 |
| CPSY, IPSJ-ARC | 2016-10-06 10:00 |
Chiba | Makuhari-messe | [Poster Presentation]
A Loss-Less Data Compression Algorithm for GPUs Shunji Funasaka, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2016-46 |
There is no doubt that data compression is very important in computer engineering. However, most lossless data compressi... [more] | CPSY2016-46 pp.19-24 |
| VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] | 2016-01-20 15:05 |
Kanagawa | Hiyoshi Campus, Keio University | A Parallel Algorithm for Realizing the MacCormack Scheme in Computational Fluid Dynamics and its FPGA Implementation Yusuke Haga, Shinobu Nagayama, Shin'ichi Wakabayashi, Masato Inagi (Hiroshima City Univ.) VLD2015-93 CPSY2015-125 RECONF2015-75 |
In many partial differential equation models used in various applications such as fluid analysis, their analytical solut... [more] | VLD2015-93 CPSY2015-125 RECONF2015-75 pp.137-142 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2015-08-06 13:30 |
Oita | B-Con Plaza (Beppu) | Parallelization of Approximate String Matching Based on Computation of Prefix Sums Yasuaki Mitani, Fumihiko Ino, Kenichi Hagihara (Osaka Univ.) CPSY2015-39 |
In this paper, aiming at accelerating string search, we propose a parallel method for a shift-or algorithm. Our method a... [more] | CPSY2015-39 pp.229-234 |
| VLD | 2015-03-04 11:35 |
Okinawa | Okinawa Seinen Kaikan | A parallel Algorithm for Realizing the Lax-Friedrichs Scheme in Computational Fluid Dynamics and its FPGA Implementation Yusuke Haga, Shinobu Nagayama, Shin'ichi Wakabayashi, Masato Inagi (Hiroshima City Univ.) VLD2014-180 |
In the model of partial differential equations used in complex numerical simulations such as fluid analysis, it is diffi... [more] | VLD2014-180 pp.153-158 |
| COMP | 2014-09-02 16:30 |
Aichi | Toyohashi University of Technology | Parallel Algorithm for Determining Shortest Paths in DAG Masahiro Migita, Masashi Toda (Kumamoto Univ.) COMP2014-23 |
In this paper, we propose an efficient parallel algorithm for determining shortest paths in a DAG(Directed Acyclic Graph... [more] | COMP2014-23 pp.55-59 |
| COMP | 2012-09-03 10:05 |
Tokyo | Hosei University | Bit-Parallel Algorithms for Finding All Substrings Matching a Regular Expression Hiroaki Yamamoto (Shinshu Univ.), Takashi Miyazaki (Nagano National College of Tech.) COMP2012-27 |
This paper is concerned with the following regular expression searching problem which, given a regular expression $r$ ... [more] |
COMP2012-27 pp.9-16 |
| DC, CPSY (Joint) |
2012-08-02 17:00 |
Tottori | Torigin Bunka Kaikan | An Optimal Parallel Prefix-sums Algorithm on the Memory Machine Models for GPUs Koji Nakano (Hiroshima Univ.) CPSY2012-15 |
The main contribution of this paper is to show optimal algorithms computing the sum and the prefix-sums on two memory m... [more] |
CPSY2012-15 pp.37-42 |
| COMP, IPSJ-AL | 2011-09-06 14:50 |
Hokkaido | Hakodate City Central Library | Extended Pseudo-tree Pattern Matching with labels of strings Hiroaki Yamamoto (Shinshu Univ.), Takashi Miyazaki (Nagano NCT) COMP2011-25 |
Given two unordered labeled trees P and T , the tree pattern matching problem for unordered labeled trees is to find all... [more] | COMP2011-25 pp.53-60 |
| RECONF, VLD, CPSY, IPSJ-SLDM [detail] | 2011-01-17 12:05 |
Kanagawa | Keio Univ (Hiyoshi Campus) | Parallelization of the channel width search for FPGA routing Hiroomi Sawada, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto) VLD2010-89 CPSY2010-44 RECONF2010-58 |
As the FPGA becomes resourceful, the design time becomes longer. Especially, routing process occupies the large portion... [more] |
VLD2010-89 CPSY2010-44 RECONF2010-58 pp.31-36 |
| RECONF | 2010-09-17 11:50 |
Shizuoka | Shizuoka University (Faculty of Eng., Hall 2) | Performance Evaluation of the SIMD/MIMD Dynamic Mode Switching Processor IMAPCAR2 Shorin Kyo, Shohei Nomoto, Shinichiro Okazaki (RE) RECONF2010-36 |
An image recognition ASSP (Application Specific Standard Product) is a kind of processor designed to be able to outper... [more] |
RECONF2010-36 pp.109-114 |
| IPSJ-SLDM, VLD, CPSY, RECONF [detail] | 2010-01-27 12:40 |
Kanagawa | Keio Univ (Hiyoshi Campus) | An efficient hardware-oriented algorithm for regular expression matching based on parallel bit-distribution Yusaku Kaneta, Shingo Yoshizawa, Shin-ichi Minato, Hiroki Arimura, Yoshikazu Miyanaga (Hokkaido Univ.) VLD2009-90 CPSY2009-72 RECONF2009-75 |
In this paper, we study the regular expression matching problem for fast data stream processing. We present an efficient... [more] | VLD2009-90 CPSY2009-72 RECONF2009-75 pp.131-136 |
| CPSY | 2007-10-26 09:00 |
Kumamoto | Kumamoto University | An examination of hardware acceleration in FPGA placement based on SA Yoshio Sonokawa, Yuji Ariuchi, Morihiro Kuga, Toshinori Sueyoshi (Kumamoto Univ.) CPSY2007-30 |
Placement is one of the steps that expend the time in the FPGA (Field Programmable Gate Array) design automation flow. ... [more] |
CPSY2007-30 pp.33-38 |
| CAS | 2007-01-29 17:15 |
Ehime | Ehime Univ. | [Invited Talk]
Efficient Problem Solving for Combinatorial Optimization Using FPGAs Shin'ichi Wakabayashi (Hiroshima City Univ.) |
With the rapid advancde of FPGA technologies, an increasing attention has been paid to a new field of FPGA applications,... [more] | CAS2006-69 pp.43-48 |
| VLD, CPSY, RECONF, IPSJ-SLDM | 2007-01-17 16:00 |
Tokyo | Keio Univ. Hiyoshi Campus | A Parallel Algorithm Based on Genetic Algorithm and Tabu Search for LSI Floorplanning and Its Implementation on a PC Cluster Takayoshi Shimazu, Shin'ichi Wakabayashi, Shinobu Nagayama (Hiroshima City Univ.) |
This paper proposes a parallel floorplanning algorithm for VLSI floorplanning, which was based on genetic algorithm (GA)... [more] | VLD2006-90 CPSY2006-61 RECONF2006-61 pp.31-36 |
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