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 Results 1 - 6 of 6  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, CPSY, RECONF, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC
(Joint) [detail]		 2019-11-13
15:00		 Ehime Ehime Prefecture Gender Equality Center On-Chip Leakage Monitor based Temperature Sensor Circuit for Ultra Low Voltage
Daisuke Sato, Kimiyoshi Usami (SIT) VLD2019-33 DC2019-57		 The increase in leakage current due to miniaturization is a big problem in devices that require low power consumption. L... [more] VLD2019-33 DC2019-57
pp.45-50
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2015-12-02
16:20		 Nagasaki Nagasaki Kinro Fukushi Kaikan Sleep Control Using Virtual Ground Voltage Detection For Fine-Grain Power Gating
Masaru Kudo, Kimiyoshi Usami (Shibaura Institute of Tech.) VLD2015-57 DC2015-53		 This paper describes a sleep control technique using leakage monitor circuit to implement Fine-Grain Power Gating (FGPG)... [more] VLD2015-57 DC2015-53
pp.129-134
RECONF, CPSY, VLD, IPSJ-SLDM [detail] 2015-01-29
17:00		 Kanagawa Hiyoshi Campus, Keio University Temperature sensor applying Body Bias in Silicon-on-Thin-BOX
Tsubasa Kosaka, Shohei Nakamura, Kimiyoshi Usami (S.I.T.) VLD2014-127 CPSY2014-136 RECONF2014-60		 The performance advancement by the transistor scaling is blocked by increase of power consumption and process variation.... [more] VLD2014-127 CPSY2014-136 RECONF2014-60
pp.99-104
VLD 2014-03-05
13:00		 Okinawa Okinawa Seinen Kaikan Investigation of thermal monitor for applying to Dynamic Voltage Scaling in SOTB
Tatsuya Wada, Kimiyoshi Usami (Shibaura Inst. of Tech) VLD2013-160		 SOTB (Silicon on Thin Buried Oxide) transistors can operate at high speed in the ultra-low voltage. However, variation i... [more] VLD2013-160
pp.141-146
CPSY, VLD, RECONF, IPSJ-SLDM [detail] 2013-01-16
16:00		 Kanagawa   Break Even Time Evaluation of Run-Time Power Gating Control by On-chip Leakage Monitor
Kensaku Matsunaga, Masaru Kudo (SIT), Yuya Ohta, Nao Konishi (SIT), Hideharu Amano (KU), Ryuichi Sakamoto, Mitaro Namiki (TUAT), Kimiyoshi Usami (SIT) VLD2012-118 CPSY2012-67 RECONF2012-72		 Run-time Power Gating (RTPG) reduces leakage energy by turning off a power switch(PS) for idle periods of a circuit duri... [more] VLD2012-118 CPSY2012-67 RECONF2012-72
pp.63-68
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2012-11-28
13:50		 Fukuoka Centennial Hall Kyushu University School of Medicine Control of Fine-Grain Power Gating by Detecting of the Virtual Ground Voltage
Masaru Kudo, Kimiyoshi Usami (Shibaura Institute of Tech.) VLD2012-98 DC2012-64		 This paper describes fine-grain control to power gate function units using the charge up phenomenon of the virtual groun... [more] VLD2012-98 DC2012-64
pp.225-230
 Results 1 - 6 of 6  /   
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