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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD | 2017-04-21 11:25 |
Tokyo | [Invited Lecture]
A 2x Logic Density Programmable Logic Array using Atom Switch Yukihide Tsuji, Xu Bai, Ayuka Morioka, Miyamura Makoto, Ryusuke Nebashi, Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada, Tadahiko Sugibayashi (NEC)  ICD2017-14 |
(To be available after the conference date) [more] | ICD2017-14 pp.73-78 |
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| MSS, SS | 2017-01-26 16:20 |
Kyoto | Kyoto Institute of Technology | A system for autocompleting a partial Web GUI testing code with user interaction capturing Manabu Nakajima, Yoshiaki Takata (Kochi Univ. of Tech.) MSS2016-66 SS2016-45 |
Programmable testing and capture-replay testing are two main categories of Web GUI testing. In the programmable testing,... [more] | MSS2016-66 SS2016-45 pp.53-57 |
| ICD, CPSY | 2016-12-15 10:05 |
Tokyo | Tokyo Institute of Technology | 56-Level Programmable Voltage Detector in Steps of 50mV for Battery Management Teruki Someya (Univ. of Tokyo), Kenichi Matsunaga, Hiroki Morimura (NTT), Takayasu Sakurai, Makoto Takamiya (Univ. of Tokyo) ICD2016-51 CPSY2016-57 |
A programmable voltage detector (PVD) for the battery management is developed for the first time. In battery management ... [more] | ICD2016-51 CPSY2016-57 pp.1-5 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-28 15:30 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Hardware implementation of PLC Instructions by high level synthesis Ishigaki Yoshiki, Tanaka Tasuku, Fujieda Naoki, Ichikawa Shuichi (TUT) RECONF2016-43 |
The hardware implementation of instruction sequence is a method to conceal and to protect the intellectual property. ... [more] |
RECONF2016-43 pp.19-24 |
| DC, SS | 2016-10-28 11:45 |
Shiga | Hikone Kinro-Fukushi Kaikan Bldg. | A Study of the Growth of Programmers with Online Judge Archives Yusaku Noriyuki, Takao Nakagawa, Hideaki Hata, Kenichi Matsumoto (NAIST) SS2016-34 DC2016-36 |
An online judge is an online system that provides programming problems and an environment for compiling and testing subm... [more] | SS2016-34 DC2016-36 pp.97-101 |
| PN | 2016-09-02 11:45 |
Hokkaido | KKR Hakodate | Proposal of the Photonic Programmable Node Architecture using Virtual Reconfigurable Communication Processors Satoru Okamoto, Jun Matsumoto, Takehiro Sato, Naoaki Yamanaka (Keio Univ.) PN2016-24 |
The concept of the Smart Photonic Clod has been proposed. To realize the Smart Photonic Cloud, 3S technologies; the Scal... [more] | PN2016-24 pp.59-64 |
| ICM | 2016-03-11 14:40 |
Okinawa | [Invited Talk]
Management, Operation and Use case for Virtualized Network Yuki Minami (NTT) ICM2015-56 |
I describe the know-how and challenges finding from the management and operation of the network virtualization infrastru... [more] | ICM2015-56 pp.75-76 |
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| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 11:40 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | A Software-Oriented Design and Synthesis Platform for a Construction of Real-Time Systems on Programmable SoCs Takuya Hatayama, Yusuke Tani, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) RECONF2015-53 |
We have been developing SWORDS platform, a SoftWare ORiented Design and Synthesis platform.SWORDS platform aims at impro... [more] | RECONF2015-53 pp.27-32 |
| SCE | 2015-08-04 13:55 |
Kanagawa | Yokohama National Univ. | Evaluation of programmable single-flux-quantum logic cells using ferromagnetic patterns Soya Taniguchi, Hiroshi Ito, Kouta Ishikawa, Sota Kurokawa, Masamitsu Tanaka, Hiroyuki Akaike, Akira Fujimaki (Nagoya Univ.) SCE2015-9 |
We evaluated programmable single-flux-quantum (SFQ) logic cells based on superconducting phase-shift elements(PSEs) made... [more] | SCE2015-9 pp.5-10 |
| RECONF | 2015-06-19 10:00 |
Kyoto | Kyoto University | [Special Talk]
Semiconductor Innovation seen from Makimoto's Wave and its Impact Tsugio Makimoto (SSIS) RECONF2015-1 |
Nearly a quarter century has passed since Makimoto’s Wave was introduced to the public in 1991. In the meantime, the sem... [more] | RECONF2015-1 pp.1-6 |
| RECONF | 2015-06-19 14:35 |
Kyoto | Kyoto University | ROS compliant componentizing of image processing hardware on a Programmable SoC Kazushi Yamashina, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.) RECONF2015-8 |
In recent years, robots are expected to be autonomous, and their control software become complex and highly functional. ... [more] | RECONF2015-8 pp.41-46 |
| RECONF | 2015-06-20 09:30 |
Kyoto | Kyoto University | A SW/HW Interface Implementation Method in the System Design Environment for Programmable SoCs Yusuke Tani, Takuya Hatayama, Hideki Takase, Kazuyoshi Takagi, Naofumi Takagi (Kyoto Univ.) RECONF2015-14 |
A programmable SoC, which integrates processors and FPGA on the same chip, has become attracted attention in embedded sy... [more] | RECONF2015-14 pp.73-78 |
| RECONF, CPSY, VLD, IPSJ-SLDM [detail] | 2015-01-30 15:55 |
Kanagawa | Hiyoshi Campus, Keio University | Obfuscated Hardware Implementation of PLC Instructions with Opaque Predicates Kazuki Uyama, Naoki Fujieda, Shuichi Ichikawa (Toyohashi Tech.) VLD2014-148 CPSY2014-157 RECONF2014-81 |
Tamper-proofing technology for instruction sequences of programmable logic controllers（PLCs）is required to protect trade... [more] | VLD2014-148 CPSY2014-157 RECONF2014-81 pp.221-226 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-28 10:30 |
Oita | B-ConPlaza | The LSI Implementation of a Memory Based Field Programmable Device for MCU Peripherals Yoshifumi Kawamura, Naoya Okada, Yoshio Matsuda (Kanazawa Univ.), Tetsuya Matsumura (Nihon Univ.), Hiroshi Makino (OIT), Kazutami Arimoto (Okayama Prefectural Univ.) VLD2014-108 DC2014-62 |
A Field Programmable Sequencer and Memory (FPSM), which is an embedded memory based programmable device for peripherals ... [more] | VLD2014-108 DC2014-62 pp.239-244 |
| CS | 2014-11-07 08:00 |
Hokkaido | Shiretoko (Hokkaido) | Evaluation of programmable WDM/TDM-PON system Jun Sugawa, Koji Wakayama, Toshiyuki Odaka, Hidehiro Toyoda (Hitachi) CS2014-61 |
Future optical access networks require effective multi-service accommodation in addition to low cost, low power consumpt... [more] | CS2014-61 pp.43-48 |
| SCE | 2014-07-23 13:25 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Sampling Measurement of 10 Vrms AC Voltage Using AC-Programmable Josephson Voltage Standard Yasutaka Amagai, Michitaka Maruyama, Hirotake Yamamori, Chiharu Urano, Hiroyuki Fujiki, Nobu-hisa Kaneko (AIST) SCE2014-30 |
We are developing a sampling measurement system using AC-Programmable Josephson voltage standard (AC-PJVS) toward low-fr... [more] | SCE2014-30 pp.37-42 |
| NS, IN (Joint) |
2014-03-06 11:00 |
Miyazaki | Miyazaki Seagia | A Planning Framework for Deployment of Network Functions in Programmable Networks Yoshiaki Yoshida, Masaki Fukushima, Atsushi Tagami (KDDI R&D Labs), Shu Yamamoto, Akihiro Nakao (Univ. of Tokyo) NS2013-213 |
Recent progress on virtualization and programmable network technologies brings opportunities for network operators to fl... [more] | NS2013-213 pp.213-218 |
| SCE | 2014-01-23 09:35 |
Tokyo | Kikaishinkou-kaikan Bldg. | Generation of 10 Vrms AC Waveforms and Low-Frequency Sampling Measurements using AC Programmable Josephson Voltage Standard System Yasutaka Amagai, Michitaka Maruyama, Hirotake Yamamori (AIST), Shih-Fang Chen (ITRI), Hiroyuki Fujiki, Nobu-hisa Kaneko (AIST) SCE2013-36 |
We are developing a sampling measurement system using AC-Programmable Josephson voltage standard system (AC-PJVS) toward... [more] | SCE2013-36 pp.7-12 |
| CS, OCS (Joint) |
2014-01-23 10:10 |
Tokyo | Hajijo-jima Ohgagou Kouminkan | Proposal of programmable WDM/TDM-PON system realizing efficient multi-sevice accomodation Jun Sugawa, Toshiyuki Odaka, Hidehiro Toyoda (Hitachi) CS2013-98 |
(Advance abstract in Japanese is available) [more] | CS2013-98 pp.81-86 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-27 14:05 |
Kagoshima | Improved via programmable structured ASIC VPEX3S
-- Improvement of basic logic element to improve operation speed -- Taku Otani, Ryohei Hori (Ritsumeikan Univ.), Masaya Yoshikawa (Meijo Univ.), Takeshi Fujino (Ritsumeikan Univ.) VLD2013-70 DC2013-36 |
We have been studying via programmable structured ASIC architecture “VPEX3(Via Programmable Logic using Exclusive-OR Arr... [more] | VLD2013-70 DC2013-36 pp.75-80 |
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