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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| IN, NS (Joint) |
2019-03-05 09:00 |
Okinawa | Okinawa Convention Center | Multipoint high-speed transfer experiment using big data of fusion experiment device LHD Kenjiro Yamanaka (Sokendai/NII), Hideya Nakanishi (NIFS), Takahisa Ozeki, Shinsuke Tokunaga, Yasutomo Ishii (QST), Shunji Abe, Shigeo Urushidani (Sokendai/NII), Takashi Yamamoto, Masahiko Emoto (NIFS)  NS2018-233 |
In the advanced science and technology field, we often make huge experiment / observation equipment with international c... [more] | NS2018-233 pp.237-242 |
| NS, IN (Joint) |
2018-03-01 10:50 |
Miyazaki | Phoenix Seagaia Resort | Remote replication for LHD's large data
-- 4 Gbps data transfer of 145 TB data using MMCFTP and piplelined replication -- Kenjiro Yamanaka (SOKENDAI/NII), Hideya Nakanishi (NIFS), Takahisa Ozeki (QST), Shunji ABE, Shigeo Urushidani (SOKENDAI/NII), Takashi Yamamoto, Masahiko Emoto, Noriyoshi Nakajima (NIFS) NS2017-180 |
Large volumes of data shared internationally in advanced research projects are often composed of many small files. Trans... [more] | NS2017-180 pp.73-78 |
| WBS, SAT (Joint) |
2015-05-28 13:25 |
Tokyo | Tokyo City Univ. (Setagaya Campus) | A study on reducing power consumption of DBF/channelizer for communication satellite Teruaki Orikasa, Amane Miura (NICT), Naoki Kobayashi (NTS), Shinji Senba (AXIS) SAT2015-2 |
We have been researching and developing the DBF/DC (Digital Beam Former and Digital Channelizer) for communication satel... [more] | SAT2015-2 pp.7-12 |
| IT, ISEC, WBS | 2010-03-05 13:25 |
Nagano | Nagano-Engineering Campus, Shinshu University | Behavior Level Design of Turbo TCM Decoder
-- Automatic Synthesis of Pipeline Processing Circuit and Comparison of RTL Design -- Hayato Taira, Haruo Ogiwara (Nagaoka Univ. of Tech.) IT2009-122 ISEC2009-130 WBS2009-101 |
This paper shows a turbo TCM (Trellis Coded Modulation) hardware decoder design with a pipeline processing circuit using... [more] | IT2009-122 ISEC2009-130 WBS2009-101 pp.331-335 |
| SIS | 2008-06-13 13:15 |
Hokkaido | An Architecture of Photo Core Transform in HD Photo Coding System for Embedded System of Various Bandwidths Koichi Hattori (Kyoto Univ.), Hiroshi Tsutsui (Osaka Univ.), Hiroyuki Ochi (Kyoto Univ.), Yukihiro Nakamura (Ritsumeikan Univ.) SIS2008-21 |
In this paper, we propose a novel architecture of photo core transform (PCT) which is used as transformation of image da... [more] | SIS2008-21 pp.39-44 |
|
| CPSY | 2007-12-19 13:00 |
Kyoto | Campus Plaza Kyoto | Evaluation of Switch Architecture Using Hybrid Structure of Crossbar and Arbiter under Variable Length Packet Environment Takanori Mitsuno, Hiroaki Nishi (Keio Univ.) CPSY2007-41 |
New router architecture is required for achieving large-bandwidth and fine-grain communication to fill the needs of the ... [more] | CPSY2007-41 pp.3-8 |
| VLD, IPSJ-SLDM | 2007-05-10 15:20 |
Kyoto | Kyodai Kaikan | An Architecture Design and its Evaluation for Speech Recognition System Joh Hashimato, Makoto Saitsuji, Takashi Kambe (Kinki Univ.) VLD2007-5 |
Speech recognition is becoming a popular technology for the implementation of human interfaces. However, conventional ap... [more] | VLD2007-5 pp.25-30 |
| VLD, ICD, DC, IPSJ-SLDM | 2005-12-02 11:25 |
Fukuoka | Kitakyushu International Conference Center | A Method for Allocating Bus Transfer and Task Execution Cycles Based on Scenarios Seiji Yamaguchi, Tadaaki Tanimoto, Akio Nakata, Teruo Higashino (Osaka Univ.) |
In designing a bus system, it is important to derive a real-time constraint (the number of available cycles) for each ta... [more] | VLD2005-80 ICD2005-175 DC2005-57 pp.25-30 |
| RECONF | 2005-09-16 09:00 |
Hiroshima | Programmable Numerical Function Generators: Architectures and Synthesis Method Shinobu Nagayama (Hiroshima City Univ.), Tsutomu Sasao (K.I.T), Jon T. Butler (Naval Postgraduate School) |
This paper presents an architecture and a synthesis method for programmable numerical function generators (NFGs) of trig... [more] | RECONF2005-41 pp.1-6 |
|
| PN, CS, OCS (Joint) |
2005-05-23 13:55 |
Okinawa | Hotel Moonbeach (Okinawa) | On providing priority-control and fairness in buffer management for optical packet switches Hiroaki Harai (NICT) |
Previously, we proposed high-throughput buffer management mechanism based on a parallel and pipeline processing architec... [more] | PN2005-9 pp.11-16 |
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