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Committee Date Time Place Paper Title / Authors Abstract Paper #
ICD, ITE-IST 2008-10-22
16:15		 Hokkaido Hokkaido University High-Speed Low-Power CMOS Quantizer with Digital Calibration
Yoshie Harada, Yoshihiro Masui, Takeshi Yoshida, Atsushi Iwata (Hiroshima Univ.) ICD2008-65		 A 1GHz sampling and 4bit resolution flash quantizer applied to a wideband ΔΣ analog-to-digital converter was developed w... [more] ICD2008-65
pp.37-42
ICD 2006-05-26
11:00		 Hyogo Kobe University A 80/100 MS/s 76.3/70.1-dB SNDR ΔΣ ADC for digital TV receivers
Yoshihisa Fujimoto, Yusuke Kanazawa, Pascal LoRe, Masayuki Miyamoto (Sharp) 		A 4th-order switched-capacitor $\Delta\Sigma$ ADC with a 4-bits quantizer is designed for a low-power direct-conversion ... [more] ICD2006-31
pp.55-60
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