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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2014-11-28
14:45		 Oita B-ConPlaza On-chip delay measurement for FPGAs
Kentaro Abe, Yousuke Miyake, Seiji Kajihara, Yasuo Sato (KIT) VLD2014-109 DC2014-63		 This paper describes an on-chip delay measurement method that targets a logic circuit on an FPGA. While advances in semi... [more] VLD2014-109 DC2014-63
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