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Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF, VLD, CPSY, IPSJ-SLDM [detail] 2011-01-18
16:05		 Kanagawa Keio Univ (Hiyoshi Campus) A Validation of FPGA-based Many-core Simulator ScalableCore System
Shinya Takamaeda, Ryosuke Sasakawa, Kenji Kise (Tokyo Tech) VLD2010-112 CPSY2010-67 RECONF2010-81		 We have proposed and been developing the ScalableCore system, FPGA-based simulation system for tile many-core architectu... [more] VLD2010-112 CPSY2010-67 RECONF2010-81
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