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Committee Date Time Place Paper Title / Authors Abstract Paper #
MW, ED 2007-01-17
10:10		 Tokyo Kikai-Shinko-Kaikan Bldg. Vdd Gate Biasing RF CMOS Amplifier Design Technique Based on the Effect of Carrier Velocity Saturation
Noboru Ishihara (Gunma Univ.) 		One of the interesting MOSFET characteristics is the effect of carrier velocity saturation (CVS) on the drain current. I... [more] ED2006-201 MW2006-154
pp.7-12
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