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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 41 - 60 of 116 [Previous]  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-20
14:15		 Kanagawa Hiyoshi Campus, Keio University Design of Stencil Computation based on Building-Cube Method on an FPGA Accelerator with High Level Synthesis
Rie Soejima, Koji Okina, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2015-91 CPSY2015-123 RECONF2015-73		 In building-cube method (BCM), which is one of the adaptive mesh refinement, the computational region is divided into a ... [more] VLD2015-91 CPSY2015-123 RECONF2015-73
pp.125-130
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
09:25		 Kanagawa Hiyoshi Campus, Keio University Discussion on FPGA implementation of real-time human detection using FIND features
Yoshiki Hayashida, Masahito Oishi, Ryo Fujita, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2015-99 CPSY2015-131 RECONF2015-81		 In this paper, we discuss FPGA implementation of image-based human
detection using the feature interaction descriptor ... [more]		 VLD2015-99 CPSY2015-131 RECONF2015-81
pp.173-178
VLD, CPSY, RECONF, IPSJ-SLDM, IPSJ-ARC [detail] 2016-01-21
09:50		 Kanagawa Hiyoshi Campus, Keio University FPGA Implementation of a Peak Detection System using AMPD Algorithm
Fumihiko Iwasaki, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ) VLD2015-100 CPSY2015-132 RECONF2015-82		 Peak detection of time-series data is widely used in various
applications. A demand for implementation of low-latency... [more]		 VLD2015-100 CPSY2015-132 RECONF2015-82
pp.179-184
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2015-12-03
10:10		 Nagasaki Nagasaki Kinro Fukushi Kaikan High-level synthesis of an image-based human detection FPGA system with a machine learning technique
Ryo Fujita, Masahito Oishi, Yoshiki Hayashida, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2015-58		 In this paper, we discuss an FPGA implementation of image-based human detection system using histograms of oriented grad... [more] RECONF2015-58
pp.57-62
RECONF 2015-09-18
09:50		 Ehime Ehime University Comparison of machine learning classifiers for HOG-based human detection on an FPGA
Masahito Oishi, Yoshiki Hayashida, Ryo Fujita, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2015-34		 In this paper, we compare Real AdaBoost and a linear SVM from a view point of FPGA implementation of an image-based huma... [more] RECONF2015-34
pp.13-18
RECONF 2015-09-18
13:50		 Ehime Ehime University Empirical evaluation of an arithmetic design approach with diversity and redundancy for FPGAs
Yudai Shirakura, Kenichi Morimoto (Nagasaki Univ.), Masanori Nobe (MHPS), Masaharu Tanaka (MHI), Yuichiro Shibata, Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) RECONF2015-38		 While application of FPGAs in control systems of industrial infrastructures is promising, how to keep the functional saf... [more] RECONF2015-38
pp.33-38
RECONF 2015-06-19
15:35		 Kyoto Kyoto University Realization of FPGA Control Processing with Functional Safety
Kenichi Morimoto (Nagasaki Univ.), Masanori Nobe (MHPS), Masaharu Tanaka (MHI), Yuichiro Shibata, Yudai Shirakura, Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) RECONF2015-10		 This paper presents a design approach of FPGA for the main processing unit in the industrial control systems. It is clar... [more] RECONF2015-10
pp.53-57
RECONF 2015-06-19
16:00		 Kyoto Kyoto University An arithmetic design approach with diversity and redundancy for FPGAs
Yudai Shirakura, Kenichi Morimoto (Nagasaki Univ.), Masanori Nobe (MHPS), Masaharu Tanaka (MHI), Yuichiro Shibata, Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) RECONF2015-11		 While application of FPGAs in control systems of industrial infrastructures is promising, a warranty of the functional s... [more] RECONF2015-11
pp.59-63
RECONF, CPSY, VLD, IPSJ-SLDM [detail] 2015-01-29
16:05		 Kanagawa Hiyoshi Campus, Keio University FPGA Implementation of a High Time Resolution Signal Generation Circuit for PWM
Shun Kashiwagi, Daiki Mitsutake, Hironobu Taniguchi, Yuichiro Shibata, Kiyoshi Oguri, Hidenori Maruta, Fujio Kurokawa (Nagasaki Univ.) VLD2014-125 CPSY2014-134 RECONF2014-58		 Recently, high-frequency digitally controlled switching power supplies
have received increasing attention in the conte... [more]		 VLD2014-125 CPSY2014-134 RECONF2014-58
pp.85-90
RECONF, CPSY, VLD, IPSJ-SLDM [detail] 2015-01-30
08:30		 Kanagawa Hiyoshi Campus, Keio University Discussion on power performance optimization for stream processing on an FPGA accelerator
Kota Fukumoto, Koji Okina, Rie Soejima, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2014-131 CPSY2014-140 RECONF2014-64		  [more] VLD2014-131 CPSY2014-140 RECONF2014-64
pp.123-128
RECONF, CPSY, VLD, IPSJ-SLDM [detail] 2015-01-30
08:50		 Kanagawa Hiyoshi Campus, Keio University A proposal of a stream image compression architecture using neural networks
Kaoru Hamasaki, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) VLD2014-132 CPSY2014-141 RECONF2014-65		 Real-time image processing systems based on an application-specific
streamed processing architecture configured on an ... [more]		 VLD2014-132 CPSY2014-141 RECONF2014-65
pp.129-132
PRMU 2014-12-12
14:45		 Fukuoka   Performance Comparison of GPU Implementation, HIPR and BK for Streo Vision for Graph Cut
Kenji Maruo, Kiyoshi Oguri, Yuichiro Shibata (Nagasaki Univ) PRMU2014-83		 Recently the graph cut is a widely used technique in the field of the vision．However,a graph cut takes much time if size... [more] PRMU2014-83
pp.103-109
PRMU 2014-12-12
15:15		 Fukuoka   A study on the placement of GPU graph cut graph data for stereovision Guide to the Technical Report and Template
Ko Tamura, Kiyoshi Oguri, Yuichiro Shibata (Nagasaki Univ.) PRMU2014-84		 We have implemented the Push Relabel graph cut algorithm on GPU(Graphics Processing Unit) to accomplish
a real time st... [more]		 PRMU2014-84
pp.111-116
PRMU 2014-12-12
15:45		 Fukuoka   A study on speedup of the graph cut PushRelabel processing using GPU Dynamic Parallelism
Rei Kasedo, Kiyoshi Oguri, Yuichiro Shibata (Nagasaki Univ) PRMU2014-85		 We have implemented a PushRelabel algorithm using a NVIDIA and CUDA.
In late years the CUDA which is a GPU developping... [more]		 PRMU2014-85
pp.117-121
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2014-11-26
11:35		 Oita B-ConPlaza Efficient FPGA resource allocation for HOG-based human detection
Masahito Oishi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2014-39		 In this paper, we discuss implementation for highly efficient and compact FPGA implementation of an image-based
real-ti... [more]		 RECONF2014-39
pp.31-36
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2014-11-27
16:50		 Oita B-ConPlaza Accelerating finite field arithmetic with a suitable word size
Aiko Iwasaki, Yuichiro Shibata, Kiyoshi Oguri, Ryuichi Harasawa (Nagasaki Univ.) RECONF2014-44		 In this paper, we implement architecture to speed up $GF(2^m)$ arithmetic in Elliptic Curve Cryptography(ECC) systems as... [more] RECONF2014-44
pp.57-61
RECONF 2014-06-12
14:35		 Miyagi Katahira Sakura Hall A Memory Profiling Framework for Stencil Computation on an FPGA Accelerator with High Level Synthesis
Koji Okina, Rie Soejima, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2014-11		  [more] RECONF2014-11
pp.55-60
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2013-11-28
09:20		 Kagoshima   A trade-off between hardware resources and detection accuracy for FPGA implementation of separability filters
Jimpei Hamamura, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2013-48		 We propose three methods to reduce hardware resources required for FPGA implementation of separability filters and evalu... [more] RECONF2013-48
pp.51-56
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2013-11-28
13:45		 Kagoshima   Implementation of a fast runtime visualization of a GPU-based electromagnetic simulation using a 3D-FDTD method
Kota Aoki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri, Takafumi Fujimoto (Nagasaki Univ.) CPSY2013-65		 In this paper, we present implementation and evaluation of a fast runtime visualization of a GPU-based electromagnetic s... [more] CPSY2013-65
pp.35-40
RECONF 2013-09-18
16:20		 Ishikawa Japan Advanced Institute of Science and Technology A Power-Performance model for 3-D stencil computation on an FPGA accelerator
Keisuke Dohi, Kota Fukumoto, Yuichiro Shibata, Kiyoshi Oguri (Nagasaki Univ.) RECONF2013-23		 This paper presents user space parameters and characteristics modeling of 3-D stencil computing on a stream-oriented FPG... [more] RECONF2013-23
pp.19-24
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