Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
CPSY |
2014-11-14 11:45 |
Hiroshima |
Hiroshima University |
An implementation of high-throughput computing system using the GPU Kazuya Tani, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2014-70 |
[more] |
CPSY2014-70 pp.93-98 |
CPSY |
2014-11-14 12:10 |
Hiroshima |
Hiroshima University |
Accelerating RSA encryption using GPUs Ryosuke Sakai, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2014-71 |
[more] |
CPSY2014-71 pp.99-104 |
CPSY, DC (Joint) |
2014-07-28 14:05 |
Niigata |
Toki Messe, Niigata |
An Efficient Implementation of the Gradient-based Hough Transform using DSP slices and block RAMs on the FPGA Xin Zhou, Yasuaki Ito, Koji Nakano (Hiroshima Univ.) CPSY2014-12 |
[more] |
CPSY2014-12 pp.13-18 |
CPSY, DC (Joint) |
2014-07-29 13:30 |
Niigata |
Toki Messe, Niigata |
Parallel Algorithms for the Summed Area Table on the Asynchronous Hierarchical Memory Machine, with GPU implementations Akihiko Kasagi, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2014-23 |
The main contribution of this paper is to introduce
the asynchronous Hierarchical Memory Machine (asynchronous HMM),
w... [more] |
CPSY2014-23 pp.79-84 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-28 14:10 |
Kagoshima |
|
TinyCSE: Tiny Computer System for Education Ryosuke Nakamura, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2013-66 |
[more] |
CPSY2013-66 pp.41-45 |
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-29 10:55 |
Kagoshima |
|
A Flexible-Length-Arithmetic Processor Using Embedded DSP Slices and Block RAMs in FPGAs Md. Nazrul Islam Mondal, Kohan Sai, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2013-69 |
[more] |
CPSY2013-69 pp.59-64 |
CPSY |
2013-11-08 09:40 |
Hiroshima |
|
The Approximate String Matching on the Hierarchical Memory Machine, with Performance Evaluation Man Duhu, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2013-41 |
[more] |
CPSY2013-41 pp.13-18 |
CPSY |
2013-11-08 10:00 |
Hiroshima |
|
An Implementation of Hough Transform on the GPU Norihiro Tomagou, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2013-42 |
[more] |
CPSY2013-42 pp.19-23 |
DC, CPSY (Joint) |
2013-08-02 09:00 |
Fukuoka |
Kitakyushu-Kokusai-Kaigijyo |
ASCII Art Generation using the Local Exhaustive Search on the GPU Yuji Takeuchi, Daisuke Takafuji, Yasuaki Ito, Koji Nakano (Hiroshima Univ.) CPSY2013-15 |
[more] |
CPSY2013-15 pp.31-35 |
DC, CPSY (Joint) |
2013-08-02 09:30 |
Fukuoka |
Kitakyushu-Kokusai-Kaigijyo |
An Optimal Offline Permutation Algorithm on the Hierarchical Memory Machine, with the GPU implementation Akihiko Kasagi, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2013-16 |
[more] |
CPSY2013-16 pp.37-42 |
DC, CPSY (Joint) |
2013-08-02 10:00 |
Fukuoka |
Kitakyushu-Kokusai-Kaigijyo |
Template Matching using DSP slices on the FPGA Kaoru Hashimoto, Yasuaki Ito, Koji Nakano (Hiroshima Univ.) CPSY2013-17 |
[more] |
CPSY2013-17 pp.43-48 |
CPSY |
2012-10-12 09:00 |
Hiroshima |
|
An implementation of Hough Transform Using DSP blocks and block RAMs on the FPGA Xin Zhou, Yasuaki Ito, Koji Nakano (Hiroshima Univ.) CPSY2012-31 |
[more] |
CPSY2012-31 pp.1-6 |
CPSY |
2012-10-12 10:30 |
Hiroshima |
|
A GPU Implementation of Conflict-Free Offline Permutation Akihiko Kasagi, Koji Nakano, Yasuaki Ito (Hiroshima Univ.) CPSY2012-35 |
[more] |
CPSY2012-35 pp.25-30 |
CPSY |
2012-10-12 10:50 |
Hiroshima |
|
An Efficient Implementation of Ant Colony Optimization for the Traveling Salesman Problem on the GPU Akihiro Uchida, Yasuaki Ito, Koji Nakano (Hiroshima Univ.) CPSY2012-36 |
[more] |
CPSY2012-36 pp.31-36 |
RECONF |
2012-05-29 13:35 |
Okinawa |
Tiruru (Naha Okinawa, Japan) |
An FPGA Implementation for a 3-layer Perceptron with the FDFM Processor Core Approach Yuki Agou, Yasuaki Ito, Koji Nakano (Hiroshima Univ.) RECONF2012-8 |
[more] |
RECONF2012-8 pp.43-48 |
RECONF |
2010-05-14 13:15 |
Nagasaki |
|
An Efficient Implementation of Exhaustive Verification of the Collatz Conjecture using DSP48E blocks of Xilinx Virtex-5 FPGAs Yasuaki Ito, Koji Nakano (Hiroshima Univ.) RECONF2010-15 |
Consider the following operation on an arbitrary positive number: if the number is even, divide it by two, and if the nu... [more] |
RECONF2010-15 pp.81-86 |
RECONF |
2009-09-17 13:25 |
Tochigi |
Utsunomiya Univ. |
Component Labeling on the FPGA using Few Logic Elements Yasuaki Ito, Koji Nakano (Hiroshima Univ.) RECONF2009-20 |
In this paper, we present a hardware connected component labeling
algorithm which is a task that assigns unique IDs to ... [more] |
RECONF2009-20 pp.7-12 |
RECONF |
2009-09-18 10:50 |
Tochigi |
Utsunomiya Univ. |
An FPGA-based Tiny Processing System for Small Embedded System and Education Koji Nakano, Yasuaki Ito, Kensuke Kawakami, Koji Shigemoto (Hiroshima Univ) RECONF2009-32 |
The main contribution of this paper is to present a simple, scalable, and
portable tiny processing system which can be ... [more] |
RECONF2009-32 pp.79-84 |
RECONF |
2009-09-18 15:25 |
Tochigi |
Utsunomiya Univ. |
An FPGA-based Architecture for Verifying Collatz Conjecture Yasuaki Ito, Koji Nakano (Hiroshima Univ.) RECONF2009-40 |
Consider the following operation on an arbitrary positive number: if the number is even, divide it by two, and if the nu... [more] |
RECONF2009-40 pp.125-130 |
COMP |
2007-12-14 10:30 |
Hiroshima |
Hiroshima University |
Component Labeling for k-Concave Binary Images Using an FPGA Yasuaki Ito, Koji Nakano (Hiroshima Univ.) COMP2007-48 |
Connected component labeling is a task that assigns unique IDs to the connected components
of a binary (black and whit... [more] |
COMP2007-48 pp.1-8 |