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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
ICD, CPSY |
2015-12-17 16:00 |
Kyoto |
Kyoto Institute of Technology |
[Poster Presentation]
Performance Evaluation of Solid-State-Drives (SSDs) by Considering the effect of Error-correcting code Yusuke Yamaga, Tsukasa Tokutomi, Atsuro Kobayashi, Ken Takeuchi (Chuo Univ.) ICD2015-71 CPSY2015-84 |
In the NAND flash memory based solid-state drives (SSDs), reliability is guaranteed by error correcting code (ECC). Conv... [more] |
ICD2015-71 CPSY2015-84 p.41 |
ICD, CPSY |
2015-12-17 16:00 |
Kyoto |
Kyoto Institute of Technology |
[Poster Presentation]
Bit-Error Analysis in TLC NAND flash memories. Yoshiaki Deguchi, Tsukasa Tokutomi, Atsuro Kobayashi, Ken Takeuchi (Chuo Univ.) ICD2015-75 CPSY2015-88 |
The capacity of NAND flash memory can be expanded by increasing the bit density. In particular, 3-bit/cell triple-level ... [more] |
ICD2015-75 CPSY2015-88 p.49 |
ICD |
2015-04-16 15:15 |
Nagano |
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[Invited Talk]
Reliability enhancement techniques of TLC NAND Flash Solid-State Drives (SSDs) for archive and enterprise applications Shogo Hachiya, Shuhei Tanakamaru, Tsukasa Tokutomi, Masafumi Doi, Yuta Kitamura, Senju Yamazaki, Atsuro Kobayashi, Ken Takeuchi (Chuo Univ.) ICD2015-5 |
[more] |
ICD2015-5 pp.21-26 |
ICD, CPSY |
2014-12-01 15:15 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Poster Presentation]
Reliability Evaluation of NAND Flash Memory Atsuro Kobayashi, Shogo Hachiya, Masafumi Doi, Tsukasa Tokutomi, Ken Takeuchi (Chuo Univ) ICD2014-92 CPSY2014-104 |
[more] |
ICD2014-92 CPSY2014-104 p.63 |
ICD |
2014-04-17 11:45 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Lecture]
Hybrid Storage of ReRAM/TLC NAND Flash with RAID-5/6 for Cloud Data Centers Hiroki Yamazawa, Tsukasa Tokutomi (Chuo Univ.), Shuhei Tanakamaru, Sheyang Ning (Chuo Univ./Univ. of Tokyo), Ken Takeuchi (Chuo Univ.) ICD2014-4 |
A hybrid storage architecture of ReRAM and TLC (3bit/cell) NAND Flash with RAID-5/6 is developed to meet cloud data-cent... [more] |
ICD2014-4 pp.15-20 |
ICD |
2014-01-28 15:00 |
Kyoto |
Kyoto Univ. Tokeidai Kinenkan |
[Poster Presentation]
Error-Prediction LDPC for NAND Flash Memory Tsukasa Tokutomi (Chuo Univ.), Shuhei Tanakamaru (Chuo Univ./Univ. of Tokyo.), Ken Takeuchi (Chuo Univ.) ICD2013-108 |
Error-Prediction LDPC (EP-LDPC) error correcting code (ECC) was proposed to improve the reliability of NAND flash memori... [more] |
ICD2013-108 p.23 |
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