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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| DC | 2019-02-27 09:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A Low Capture Power Oriented X-Identification Method Mimicking Fault Propagation Paths of Capture Safe Test Vectors Kenichiro Misawa, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ), Masayoshi Yoshimura (Kyouto Sangyo Univ)  DC2018-73 |
Low power oriented don't care (X) identification and X filling methods have been proposed to reduce the numbers of captu... [more] | DC2018-73 pp.13-18 |
| DC | 2019-02-27 13:40 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | State Assignment Method to Improve Transition Fault Coverage for Datapath Masayoshi Yoshimura (Kyoto Sangyo Univ.), Yuki Takeuchi, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ.) DC2018-78 |
Recently, it is indispensable to test in transition fault model due to timing defects increase along with complication a... [more] | DC2018-78 pp.43-48 |
| DC | 2019-02-27 14:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A Compaction Method for Test Sensitization State in Controllers Yuki Ikegaya, Yuta Ishiyama, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ.) DC2018-80 |
One of the challenges on VLSI testing is to reduce the area overhead of design-for-testability and to increase the fault... [more] | DC2018-80 pp.55-60 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2018-12-06 10:55 |
Hiroshima | Satellite Campus Hiroshima | On the Generation of Random Capture Safe Test Vectors Using Neural Networks Sayuri Ochi, Kenichirou Misawa, Toshinori Hosokawa, Yukari Yamauchi, Masayuki Arai (Nihon Univ.) VLD2018-51 DC2018-37 |
Excessive capture power consumption at scan testing causes the excessive IR drop and it might cause test-induced yield l... [more] | VLD2018-51 DC2018-37 pp.89-94 |
| DC | 2018-02-20 09:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A Test Register Assignment Method for Operational Units to Reduce the Number of Test Patterns for Transition Faults Using Controller Augmentation Yuki Takeuchi, Shun Takeda, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.) DC2017-78 |
It is required to reduce the number of test patterns to reduce test cost for VLSIs. Especially, design-for-testability m... [more] | DC2017-78 pp.7-12 |
| DC | 2018-02-20 11:40 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A test generation method based on k-cycle testing for finite state machines Yuya Kinoshita, Toshinori Hosokawa (Nihon Univ.), Hideo Fujiwara (Osaka Gakuin Univ.) DC2017-81 |
Recent advances in semiconductor technologies have resulted in VLSI circuit density and complexity. As a result, efficie... [more] | DC2017-81 pp.25-30 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-06 15:20 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | A Test Register Assignment Method to Reduce the Number of Test Patterns at Register Transfer Level Using Controller Augmentation Shun Takeda, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ), Masayoshi Yoshimura (Kyoto Sangyo Univ) VLD2017-37 DC2017-43 |
Recently, it is very important to reduce the number of test patterns by using design-for-testability (DFT) with the incr... [more] | VLD2017-37 DC2017-43 pp.61-66 |
| DC | 2017-02-21 10:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A dynamic test compaction method on low power oriented test generation using capture safe test vectors Toshinori Hosokawa, Atsushi Hirai, Hiroshi Yamazaki, Masayuki Arai (Nihon Univ.) DC2016-74 |
In at-speed scan testing, capture power is a serious problem because the high power dissipation that can occur when the ... [more] | DC2016-74 pp.1-6 |
| DC | 2017-02-21 14:25 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | An Untestable Fault Identification Method for Sequential Circuits Based on SAT Using Unreachable States Morito Niseki, Toshinori Hosokawa (Nihon Univ.), Msayoshi Yoshimura (Kyoto Sangyo Univ.), Masayuki Arai (Nihon Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.) DC2016-79 |
Scan design has problems such as large hardware overhead and long test application time. Non-scan based test generation ... [more] | DC2016-79 pp.29-34 |
| DC | 2017-02-21 15:05 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A Method of Strongly Secure Scan Design Using Extended Shift Registers Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ), Hideo Fujiwara (Osaka Gakuin Univ) DC2016-80 |
[more] | DC2016-80 pp.35-40 |
| DC | 2016-06-20 15:15 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A Binding Method for Testability to Generate Easily Testable Functional Time Expansion Models Mamoru Sato, Toshinori hosokawa, Tetsuya Masuda, Jun Nishimaki (Nihon Univ.), Hideo Fujiwara (Osaka Gakuin Univ.) DC2016-14 |
A test generation method for datapaths using easily testable functional time expansion models was proposed as efficient ... [more] | DC2016-14 pp.25-30 |
| DC | 2016-02-17 14:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A Ranking Method of Suspicious Candidate Faults Using Fault Excitation Condition Analysis for Universal Logical Fault Diagnosis Hideyuki Takano, Toshinori Hosokawa, Hiroshi Yamazaki (Nihon Univ.), Koji Yamazaki (Meiji Univ.) DC2015-91 |
[more] | DC2015-91 pp.31-36 |
| DC | 2016-02-17 14:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | An RTL Test Point Insertion Method to Reduce the Number of Test Patterns Naoya Ohsaki, Toshinori Hosokawa, Hiroshi Yamazaki (NU), Masayoshi Yoshimura (KSU) DC2015-93 |
Test point insertion methods to reduce the number of test patterns have been proposed for test cost reduction of VLSIs. ... [more] | DC2015-93 pp.43-48 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-03 13:45 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | An M by N Algorithm Using Multiple Target Test Generation for Static Test Compaction Yuya Hara, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon University), Masayoshi Yoshimura (Kyoto Sangyo university) VLD2015-69 DC2015-65 |
[more] | VLD2015-69 DC2015-65 pp.207-212 |
| DC | 2015-06-16 14:10 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | A test data reduction method based on scan slice on BAST Makoto Nishikiori, Hiroshi Yamazaki, Toshinori Hosokawa, Masayuki Arai (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.) DC2015-16 |
BAST is one of techniques to reduce the amount of test data while maintaining high test quality by combining built-in se... [more] | DC2015-16 pp.1-6 |
| DC | 2015-02-13 11:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg | A Hardware Trojan Circuit Detection Method Based on Information of Nontransitional Lines Tomohiro Bouyashiki, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (KUS) DC2014-81 |
[more] | DC2014-81 pp.19-24 |
| DC | 2015-02-13 11:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg | Test Method for Encryption LSI against Scan-based Attacks Masayoshi Yoshimura (Kyoto Sangyo Univ.), Jun Nishimaki, Toshinori Hosokawa (Nihon Univ.) DC2014-82 |
[more] | DC2014-82 pp.25-30 |
| DC | 2015-02-13 14:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg | A Method of Scheduling in High-Level Synthesis for Hierarchical Testability Jun Nishimaki, Toshinori Hosokawa (Nihon Univ.), Hideo Fujiwara (Osaka Gakuin Univ.) DC2014-84 |
We previously proposed a binding method for hierarchical testability to increase the number of hierarchically testable f... [more] | DC2014-84 pp.37-42 |
| DC | 2015-02-13 16:00 |
Tokyo | Kikai-Shinko-Kaikan Bldg | An Evalution of a Fault Diagnosis Method for Single Logical Faults Using Multi Cycle Capture Test Sets Hideyuki Takano, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ.), Koji Yamazaki (Meiji Univ.) DC2014-86 |
Multi-cycle capture testing has been proposed to improve test quality of scan testing. However, fault diagnosis for mult... [more] | DC2014-86 pp.49-54 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2014-11-28 09:40 |
Oita | B-ConPlaza | A Test Generation Method for Low Capture Power Using Capture Safe Test Vectors Atsushi Hirai, Toshinori Hosokawa, Yukari Yamauchi, Masayuki Arai (Nihon Univ.) VLD2014-98 DC2014-52 |
In at-speed scan testing, capture power is a serious problem because the high power dissipation that can occur when the ... [more] | VLD2014-98 DC2014-52 pp.179-184 |
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