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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, IPSJ-SLDM 2006-05-12
11:15
Ehime Ehime University Power-Conscious Microprocessor-Based Testing of System-on-Chip
Fawnizu Azmadi Hussin, Tomokazu Yoneda (NAIST), Alex Orailoglu (Univ. of California), Hideo Fujiwara (NAIST)
In this paper, we are proposing a core-based test methodology that utilizes the functional bus for test stimuli and resp... [more] VLD2006-10
pp.25-30
VLD, ICD, DC, IPSJ-SLDM 2005-12-01
10:20
Fukuoka Kitakyushu International Conference Center Reconfigurable Wrapper Design for Multi Clock Domain Cores Under Power Constraints
Yu Tanaka, Tomokazu Yoneda, Hideo Fujiwara (NAIST)
This paper presents a re-configurable wrapper design for scan-designed multi-clock domain cores in system-on-chips. The ... [more] VLD2005-63 ICD2005-158 DC2005-40
pp.13-18
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