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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 21 - 40 of 45 [Previous]  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2015-03-06
13:50
Kagoshima   A HW/SW Cooperative System Design of Stabilization Processing of Images from Networked Cameras for the Realization of an Automatic Watch System for Safe Navigation
Takeshi Ohkawa (Utsunomiya Univ.), Yohei Matsumoto (Tokyo Marine Univ.), Manabu Inagawa (IDi), Daichi Uetake, Mayu Fusegi, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.) CPSY2014-164 DC2014-90
Accidents on vessel traffic are mainly caused by human error of deficient watch. Therefore it is expected to raise the s... [more] CPSY2014-164 DC2014-90
pp.13-18
ICD, CPSY 2014-12-01
10:00
Tokyo Kikai-Shinko-Kaikan Bldg. Consideration of SIMD Acceleration for a MIPS Instruction Processor -- A case study of processor design contest --
Kosuke Hiraishi, Akihiro Hashimoto, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) ICD2014-73 CPSY2014-85
In the system development using soft core processor on an FPGA (Field Programmable Gate Array), an access to external me... [more] ICD2014-73 CPSY2014-85
pp.1-6
CPSY, DC
(Joint)
2014-07-28
18:15
Niigata Toki Messe, Niigata Performance Evaluation of Speculative Parallel Processing Utilizing Hardware Transactional Memory on Commercial Multi-core CPU
Yutaka Matsuno, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2014-16
Recently, it becomes essential to use parallel computation utilizing thread level parallelism as a method to utilize a s... [more] CPSY2014-16
pp.37-42
CPSY, DC
(Joint)
2014-07-29
09:50
Niigata Toki Messe, Niigata A Study of Accelerated Image Processing of Stabilizing Navigational Image by HW/SW Cooperative Processing on an FPGA
Daichi Uetake, Takeshi Ohkawa (Utsunomiya Univ), Yohei Matsumoto (TUMSAT), Takashi Yokota, Kanemitsu Ootsu (Utsunomiya Univ) CPSY2014-19
Accidents on vessel traffic are mainly caused by human errors of insufficient watching. It is expected to realize auto w... [more] CPSY2014-19
pp.55-60
CPSY, DC
(Joint)
2014-07-29
15:40
Niigata Toki Messe, Niigata Consideration of 2D-FFT by Decomposition of Large Scale Data on Multi-GPU
Hiroaki Miyata, BoazJessie Jackin, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota, Yoshio Hayasaki, Toyohiko Yatagai, Takanobu Baba (Utsunomiya Univ.) CPSY2014-27
Acceleration for Fast Fourier Transform (FFT) of large computation is an important issue.
Until today, acceleration fo... [more]
CPSY2014-27
pp.103-108
CPSY, DC
(Joint)
2014-07-30
09:50
Niigata Toki Messe, Niigata Implementation of Wireless Connected Android Cluster Computer System Supporting Automatic Clustering
Yusuke Arai, Kanemitsu Ootsu, Takashi Yokota, Takeshi Ohkawa (Utsunomiya Univ.) CPSY2014-34
In recent years, high-performance mobile devices such as smartphones and tablet terminals spread rapidly, and they are b... [more] CPSY2014-34
pp.143-148
CPSY, DC
(Joint)
2014-07-30
17:25
Niigata Toki Messe, Niigata Implementation of Path Profiler for Enabling Analysis of Data Dependencies Between Program Execution Paths
Kazuki Ohshima, Kanemitsu Ootsu, Takanobu Baba, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2014-44
In present day, various techniques are required for realizing effective parallel processing according to multi-core proc... [more] CPSY2014-44
pp.203-208
RECONF 2014-06-12
15:00
Miyagi Katahira Sakura Hall A Study on Accelerating Image Recognition Processing by HW/SW Cooperative Processing on an FPGA for Automatic Watch System on Navigation
Takeshi Ohkawa (Utsunomiya Univ.), Yohei Matsumoto (Tokyo Marine Univ.), Daichi Uetake, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.) RECONF2014-12
Accidents on vessel traffic are mainly caused by human error of deficient watching. It is expected to raise the safety o... [more] RECONF2014-12
pp.61-66
CPSY, IPSJ-EMB, IPSJ-SLDM, DC [detail] 2014-03-16
14:55
Okinawa   HW/SW Hybrid Design Environment for a Cooperative System of Android Application and FPGA -- A case study in Project Based Learning (PBL) class --
Takeshi Ohkawa, Soshi Takano, Daichi Uetake, Takashi Yokota, Kanemitsu Ootsu (Utsunomiya Univ.) CPSY2013-118 DC2013-105
A HW/SW hybrid design environment for operating a circuit implemented on an FPGA is discussed. The authors have develope... [more] CPSY2013-118 DC2013-105
pp.295-300
RECONF 2013-09-19
10:35
Ishikawa Japan Advanced Institute of Science and Technology Hardware Acceleration of Inverted Pendulum Control Processing by Using the High Level Synthesis Tool JavaRock
Daichi Uetake, Takeshi Ohkawa (Utsunomiya Univ.), Takefumi Miyoshi (e-trees), Takashi Yokota, Kanemitsu Ootsu (Utsunomiya Univ.) RECONF2013-29
Microcontrollers are commonly used to develop robot control systems. However, microcontrollers do not meet recent requir... [more] RECONF2013-29
pp.55-60
DC, CPSY
(Joint)
2013-08-02
11:45
Fukuoka Kitakyushu-Kokusai-Kaigijyo Consideration of Efficient Data Communication Method using Dynamic Switching Compression Method
Masayuki Omote, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2013-20
As a method for reducing the load on network communication, the real time data compression is a promising technique.
Ho... [more]
CPSY2013-20
pp.61-66
DC, CPSY
(Joint)
2013-08-02
14:00
Fukuoka Kitakyushu-Kokusai-Kaigijyo Consideration of Checkpoint Reduction for Incremental Software Simulation
Atsushi Shina, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2013-22
Recently, development of software optimization techniques for high-performance computer architectures becomes important.... [more] CPSY2013-22
pp.73-78
DC, CPSY
(Joint)
2013-08-02
14:30
Fukuoka Kitakyushu-Kokusai-Kaigijyo Reduction of Runtime Overhead in Automated Parallel Processing System using Valgrind
Takayuki Hoshi, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2013-23
In order to efficiently utilize the performance of multicore processors, thread level parallel processing is indispensab... [more] CPSY2013-23
pp.79-84
DC, CPSY
(Joint)
2013-08-02
17:30
Fukuoka Kitakyushu-Kokusai-Kaigijyo Code Optimization for Path Based Speculative Multi-threading
Yuki Homma, Hiroyoshi Jutori, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota (Utsunomiya Univ.) CPSY2013-28
Our Two-Path Limited Speculation system PALS speculatively executes one of the top two paths of high frequency in loops.... [more] CPSY2013-28
pp.109-114
DC, CPSY
(Joint)
2013-08-02
18:00
Fukuoka Kitakyushu-Kokusai-Kaigijyo Consideration of Relation of Path Prediction and Branch Prediction in Loops
Kazuhiro Kinkai, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Takanobu Baba (Utunomiya Univ.) CPSY2013-29
We focus on Two-Path Limited Speculation method and evaluated path prediction accuracy with some path predictors.
Pred... [more]
CPSY2013-29
pp.115-120
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2012-11-26
14:30
Fukuoka Centennial Hall Kyushu University School of Medicine Proposal of Speculative Memory Access Mechanism Based on Snoop Cache
Yuji Sekiguchi, Hiroyoshi Jutori, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Takanobu Baba (Utsunomiya Univ.) CPSY2012-47
Ratio of execution path is mostly dominated by up to two execution paths in program loops. We have developed the specula... [more] CPSY2012-47
pp.1-6
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2012-11-26
14:55
Fukuoka Centennial Hall Kyushu University School of Medicine A Study of Path Prediction Mechanism for Improving Accuracy by using Detailed History Information
Hiroyoshi Jutori, Takanobu Baba, Takeshi Ohkawa, Kanemitsu Ootsu, Takashi Yokota (Utsunomiya Univ.) CPSY2012-48
Speculative multithreading expects speed-up for programs that have complicated dependency.
To achieve high performance ... [more]
CPSY2012-48
pp.7-12
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2012-11-28
13:00
Fukuoka Centennial Hall Kyushu University School of Medicine A Case Study of Short-term Development of Cooperation with FPGA-based System by Introducing Distributed-object ORB Engine
Takeshi Ohkawa, Soshi Takano, Daichi Uetake, Takashi Yokota, Kanemitsu Ootsu, Takanobu Baba (Utsunomiya Univ.) RECONF2012-56
We are developing “ORB Engine” which is a distributed-object middleware suitable for an FPGA, in order to reduce the ter... [more] RECONF2012-56
pp.51-56
DC, CPSY
(Joint)
2012-08-02
13:30
Tottori Torigin Bunka Kaikan Effect of Loop Unrolling for Two-Path Limited Speculation Method
Yuki Homma, Hiroyoshi Jutori, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Takanobu Baba (Utsunomiya Univ.) CPSY2012-9
Our Two-Path Limited Speculation system PALS speculatively executes one of the top two paths of high frequency in loops.... [more] CPSY2012-9
pp.1-6
DC, CPSY
(Joint)
2012-08-02
14:00
Tottori Torigin Bunka Kaikan Consideration of Loop Path Predictors based on Branch Prediction Methods
Kazuhiro Kinkai, Hiroyoshi Jutori, Kanemitsu Ootsu, Takeshi Ohkawa, Takashi Yokota, Takanobu Baba (Utsunomiya Univ.) CPSY2012-10
Execution path ratio is mostly dominated by up to two execution paths in program loops. We consider the Two-Path Limited... [more] CPSY2012-10
pp.7-12
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