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All Technical Committee Conferences (Searched in: All Years)
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Search Results: Conference Papers |
Conference Papers (Available on Advance Programs) (Sort by: Date Descending) |
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Committee |
Date Time |
Place |
Paper Title / Authors |
Abstract |
Paper # |
SDM |
2016-01-28 15:20 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
MTJ based "Normally-off processors" with thermal stability factor engineered perpendicular MTJ, L2 cache based on 2T-2MTJ cell, L3 and Last Level Cache based on 1T-1MTJ cell and novel error handling scheme Kazutaka Ikegami, Hiroki Noguchi, Satoshi Takaya, Chikayoshi Kamata, Minoru Amano, Keiko Abe, Keiichi Kushida, Eiji Kitagawa, Takao Ochiai, Naoharu Shimomura, Daisuke Saida, Atsushi Kawasumi, Hiroyuki Hara, Junichi Ito, Shinobu Fujita (Toshiba) SDM2015-126 |
MTJ-based cache memory is expected to reduce processor power significantly. However, write energy increases rapidly for ... [more] |
SDM2015-126 pp.27-30 |
SDM |
2015-01-27 14:50 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Low power and high memory density STT-MRAM for embedded cache memory using advanced perpendicular MTJ integrations and asymmetric compensation techniques Kazutaka Ikegami, Hiroki Noguchi, Chikayoshi Kamata, Minoru Amano, Keiko Abe, Keiichi Kushida, Takao Ochiai, Naoharu Shimomura, Shogo Itai, Daisuke Saida, Chika Tanaka, Atsushi Kawasumi, Hiroyuki Hara, Junichi Ito, Shinobu Fujita (Toshiba) SDM2014-142 |
Due to difficulty to increase clock frequency, recent processors increase cache memory to improve performance. However, ... [more] |
SDM2014-142 pp.29-32 |
ISEC |
2011-12-14 14:40 |
Tokyo |
Kikai-Shinko-Kaikan Bldg. |
[Invited Talk]
Uniquness Enhancement of PUF Responces Based on the Locations of Random Outputting RS Latches Dai Yamamoto (Fujitsu Lab.), Kazuo Sakiyama, Mitsugu Iwamoto, Kazuo Ohta (Univ. of Electro-Comm.), Takao Ochiai, Masahiko Takenaka, Kouichi Itoh (Fujitsu Lab.) ISEC2011-68 |
Physical Unclonable Functions (PUFs) are expected to represent an important solution for secure ID generation and authen... [more] |
ISEC2011-68 p.29 |
IT, ISEC, WBS |
2010-03-05 10:15 |
Nagano |
Nagano-Engineering Campus, Shinshu University |
Obtaining Local Information from FPGA Using Electromagnetic Analysis Takao Ochiai, Dai Yamamoto, Kouichi Itoh, Masahiko Takenaka, Naoya Torii, Daisuke Uchida, Toshiaki Nagai, Shinichi Wakana (Fujitsu Labs.) IT2009-105 ISEC2009-113 WBS2009-84 |
A side channel attack by means of electromagnetic analysis for SASEBO-AES was investigated. Local information from FPGA ... [more] |
IT2009-105 ISEC2009-113 WBS2009-84 pp.217-223 |
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