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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 21 - 40 of 43 [Previous]  /  [Next]  
Committee Date Time Place Paper Title / Authors Abstract Paper #
ISEC 2014-05-09
14:40
Tokyo Kikai-Shinko-Kaikan Bldg. A Study of IDS using Discrete Fourier Transform
Enkhbold Chimedtseren, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa (NDA) ISEC2014-4
Intrusion Detection System (IDS) detects an attack with an identifying pattern file which is known as called a signature... [more] ISEC2014-4
pp.21-27
ISEC 2013-05-23
13:45
Tokyo Kikai-Shinko-Kaikan Bldg. Information theoretical analysis of side-channel attack (2)
Hiroaki Mizuno, Keisuke Iwai, Hidema Tanaka, Takakazu Kurokawa (National Defense Academy) ISEC2013-3
In the evaluation of side-channel resistance, it is argued how many observation of physical phenomena which is caused by... [more] ISEC2013-3
pp.15-22
DC, CPSY
(Joint)
2012-08-02
17:30
Tottori Torigin Bunka Kaikan Proposal of performance model for block ciphers using GPGPU
Naoki Nishikawa, Keisuke Iwai, Takakazu Kurokawa (NDA) CPSY2012-16
In this paper, we present a prototype of performance model of block ciphers using GPGPU whose encryption latency is read... [more] CPSY2012-16
pp.43-48
VLD, CPSY, RECONF, IPSJ-SLDM [detail] 2012-01-26
12:40
Kanagawa Hiyoshi Campus, Keio University Discussion of Performance Prediction Model for Symmetric Block Ciphers on CUDA
Naoki Nishikawa, Keisuke Iwai, Takakazu Kurokawa (NDA) VLD2011-112 CPSY2011-75 RECONF2011-71
As the data protection with encryption becomes important day by day, the encryption processing using GPGPU has been noti... [more] VLD2011-112 CPSY2011-75 RECONF2011-71
pp.123-128
AP, RCS
(Joint)
2011-11-16
10:20
Aichi Nagoya Congress Center High Accurate Method for Estimation of the Number of Signals with QR Decomposition in low SNR
Yuki Nagahama, Takashi Matsubara, Masao Kubo, Takakazu Kurokawa (NDA) AP2011-91
MUSIC and ESPRIT are the high resolution methods for direction of arrival (DOA) estimation of signals on an array antenn... [more] AP2011-91
pp.13-18
DC, CPSY
(Joint)
2011-07-29
11:10
Kagoshima   Fast Implementations of Symmetric Block Ciphers on CUDA
Naoki Nishikawa, Keisuke Iwai, Takakazu Kurokawa (NDA) CPSY2011-13
GPU as hardware with high-cost performance has been noticed from almost all research fields. As the result, implementati... [more] CPSY2011-13
pp.25-30
RECONF, VLD, CPSY, IPSJ-SLDM [detail] 2011-01-18
10:20
Kanagawa Keio Univ (Hiyoshi Campus) Evaluation of switchable AES S-box circuit using dynamic and partial reconfiguration
Naoko Yamada (Keio Univ.), Keisuke Iwai, Takakazu Kurokawa (NDA), Hideharu Amano (Keio Univ.) VLD2010-102 CPSY2010-57 RECONF2010-71
Recently, the threat of side channel attack to the hardware encryption circuits is increasing. In order
to cope with it... [more]
VLD2010-102 CPSY2010-57 RECONF2010-71
pp.127-132
AP 2010-12-17
14:00
Tokyo Kikai-Shinko-Kaikan Bldg. DOA Estimation of Circular Signals under Conditions of Mixed Circular and Non-Circular Signals Based on Modified ESPRIT
Yohannes A Ariyadi, Takashi Matsubara, Masao Kubo, Takakazu Kurokawa (National Defense Academy) AP2010-129
 [more] AP2010-129
pp.67-72
ISEC 2010-12-15
13:50
Tokyo Kikai-Shinko-Kaikan Bldg. The Mutual Information Analysis using a classification technique of combination
Kuniji Wakabayashi, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2010-67
Against Side channel Attack Standard Evaluation BOard(SASEBO) implemented the AES encryption as hardware circuit, carr... [more] ISEC2010-67
pp.13-18
ISEC 2010-12-15
14:15
Tokyo Kikai-Shinko-Kaikan Bldg. Logarithmic model based CPA with low pass filter
Atsunori Sakurai, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2010-68
Depending on an implementation method of AES, I show that it comes off from the linear nature when I classified consumpt... [more] ISEC2010-68
pp.19-24
IT, ISEC, WBS 2010-03-05
09:25
Nagano Nagano-Engineering Campus, Shinshu University Countermeasures against Power Analysis Attacks in Assembly code
Kazunori Kawamura, Keisuke Iwai, Takakazu Kurokawa (NDA) IT2009-103 ISEC2009-111 WBS2009-82
Countermeasures for AES software implementation against power analysis attacks are proposed in this paper. Intermediate ... [more] IT2009-103 ISEC2009-111 WBS2009-82
pp.205-210
IT, ISEC, WBS 2010-03-05
09:50
Nagano Nagano-Engineering Campus, Shinshu University Electromagnetic Analysis from power line on SASEBO-R
Tetsutaro Kanno, Keisuke Iwai, Takakazu Kurokawa (NDA) IT2009-104 ISEC2009-112 WBS2009-83
The EM-analysis, one of the Side Channel attacks, has advantage for the freedom of the measuring point, espacially it is... [more] IT2009-104 ISEC2009-112 WBS2009-83
pp.211-216
IPSJ-SLDM, VLD, CPSY, RECONF [detail] 2010-01-27
10:00
Kanagawa Keio Univ (Hiyoshi Campus) Granularity Optimization Method for AES Encryption Implementation on CUDA
Naoki Nishikawa, Keisuke Iwai, Takakazu Kurokawa (NDA) VLD2009-86 CPSY2009-68 RECONF2009-71
GPGPU as parallel computation platform has been noticed from almost all reseach fields. In particular CUDA occupie... [more] VLD2009-86 CPSY2009-68 RECONF2009-71
pp.107-112
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]
2009-12-03
16:00
Kochi Kochi City Culture-Plaza Evaluation of CryptMT steam cipher implemented on FPGA
Naoko Yamada (Keio Univ.), Atsunori Sakurai, Keisuke Iwai, Takakazu Kurokawa (National Defense Academy), Hideharu Amano (Keio Univ.) RECONF2009-47
A new streaming encryption scheme: CryptMT which applied to the next generation European encryption competition eSTREAM ... [more] RECONF2009-47
pp.37-42
RCS, AP
(Joint)
2009-11-27
13:55
Tokyo Tokyo Inst. of Tech. Improvement of DOA Estimation Pairing Techniques for 3D Unitary ESPRIT
Suresh Vijayaratnam, Takashi Matsubara, Masao Kubo, Takakazu Kurokawa (NDA) AP2009-137
 [more] AP2009-137
pp.107-112
CPSY, DC
(Joint)
2009-08-04
- 2009-08-05
Miyagi   Acceleration of the key crack against cipher algorithm using CUDA
Naoki Nishikawa, Keisuke Iwai, Takakazu Kurokawa (National Defense Academy of Japan) CPSY2009-18
Recently, high performance computing using GPU has recognized. GPU has good cost-performance ratio, and exhibit the capa... [more] CPSY2009-18
pp.49-54
ISEC 2008-12-17
15:45
Tokyo Kikai-Shinko-Kaikan Bldg. Construction of the experiment environment for the CPA attack
Daisaku Minamizaki, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2008-99
SASEBO(Side-channel Attack Standard Evaluation BOard) was developed with the aim of integrating at establishment of the ... [more] ISEC2008-99
pp.61-66
ISEC 2008-05-16
09:30
Tokyo Kikai-Shinko-Kaikan Bldg. Verification of a side-channel attack to an AES circuit on SASEBO
Daisaku Minamizaki, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2008-1
Recently, the research on the side-channel attack is actively done, and SASEBO board that conformed to the INSTAC32 was ... [more] ISEC2008-1
pp.1-8
ISEC 2008-05-16
09:55
Tokyo Kikai-Shinko-Kaikan Bldg. An implementation of an automatic analyzer for side channel attacks
Keisuke Iwai, Daisaku Minamizaki, Takakazu Kurokawa (NDA) ISEC2008-2
Recently, environments for experiments of side-channel attacks are being developed. On the other hand, there is not enou... [more] ISEC2008-2
pp.9-14
ISEC 2007-12-19
09:55
Tokyo Kikai-Shinko-Kaikan Bldg. Verification of DPA against XOR in hardware implementation of AES
Yohei Tsuji, Keisuke Iwai, Takakazu Kurokawa (NDA) ISEC2007-113
DPA techniques against cryptographic devices based on hardware implementation utilize the transition probability of bit ... [more] ISEC2007-113
pp.5-10
 Results 21 - 40 of 43 [Previous]  /  [Next]  
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