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Committee Date Time Place Paper Title / Authors Abstract Paper #
DC 2012-02-13
11:55		 Tokyo Kikai-Shinko-Kaikan Bldg. A method to reduce shift-toggle rate for low power BIST
Takaaki Kato, Senling Wang, Kohei Miyase, Yasuo Sato, Seiji Kajihara (KIT) DC2011-80		 Logic BIST using scan design has a problem with high power dissipation during test. In this work we propose a method tha... [more] DC2011-80
pp.25-29
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2010-11-29
16:05		 Fukuoka Kyushu University Rotating Test and Pattern Partitioning for Field Test
Senling Wang, Seiji Kajihara, Yasuo Sato, Kohei Miyase, Xiaoqing Wen (Kyushu Insti. Tech.) 		 [more]
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