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 Conference Papers (Available on Advance Programs)  (Sort by: Date Descending)
 Results 1 - 8 of 8  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
RECONF 2009-09-17
16:05
Tochigi Utsunomiya Univ. Leakage Power Reduction of a Dynamically Reconfigurable Processors with Deal Vth cells
Hideharu Amano, Keiichiro Hirai, Toru Sano, Masaru Kato, Yoshiki Saito (Keio Univ.) RECONF2009-26
One of benefit of coarse-grained dynamically
reconfigurable processor arrays (DRPAs)
is its low dynamic power consump... [more]
RECONF2009-26
pp.43-48
RECONF 2009-05-14
13:30
Fukui   Real Chip Evaluation of Dynamically Reconfigurable Processor Array MuCCRA-3
Yoshihiro Yasuda, Yoshiki Saito, Toru Sano, Masaru Kato, Hideharu Amano (Keio Univ.) RECONF2009-2
Dynamically Reconfigurable Processor Array(DRPA) has been received an attention as a flexible and power efficient off-lo... [more] RECONF2009-2
pp.7-12
VLD, CPSY, RECONF, IPSJ-SLDM 2009-01-29
09:30
Kanagawa   Power Reduction of Dynamically Reconfigurable Processor using Dual-Vth Technologies
Keiichiro Hirai, Toru Sano, Masaru Kato, Hideharu Amano (Keio Univ.) VLD2008-93 CPSY2008-55 RECONF2008-57
 [more] VLD2008-93 CPSY2008-55 RECONF2008-57
pp.13-17
VLD, CPSY, RECONF, IPSJ-SLDM 2009-01-30
15:35
Kanagawa   Research on an Interconnection Network of the Dynamically Reconfigurable Processor: MuCCRA
Masaru Kato, Toru Sano, Hideharu Amano (Keio Univ) VLD2008-122 CPSY2008-84 RECONF2008-86
In the MuCCRA(Multi-Core Configurable Reconfigurable Architecture)
project, an architecture of configurable low-power m... [more]
VLD2008-122 CPSY2008-84 RECONF2008-86
pp.183-188
RECONF 2008-09-26
11:00
Okayama Okayama Univ. Practice Evaluation Dynamically Reconfigurable Processor MuCCRA-2β
Yoshiki Saito, Masaru Kato, Shotaro Saito, Toru Sano, Keiichiro Hirai, Takashi Nishimura, Takuro Nakamura, Satoshi Tsutsumi, Yohei Hasegawa, Hideharu Amano (Keio Univ.) RECONF2008-34
Dynamically Reconfigurable Processing Array (DRPA) have been received an attention as a flexible and efficient off-loadi... [more] RECONF2008-34
pp.69-74
RECONF 2007-05-18
10:00
Ishikawa Kanazawa Bunka Hall MuCCRA-D:A Dynamically Reconfigurable Processor with Directly Interconnected PEs
Masaru Kato, Yohei Hasegawa, Hideharu Amano (Keio Univ.) RECONF2007-12
MuCCRA-1, the first prototype of MuCCRA(Multi-Core
Configurable Reconfigurable Architecture) project,
uses a typical i... [more]
RECONF2007-12
pp.67-72
VLD, CPSY, RECONF, IPSJ-SLDM 2007-01-18
13:50
Tokyo Keio Univ. Hiyoshi Campus Implementation of Dynamically Reconfigurable Processor MuCCRA
Takuro Nakamura, Yohei Hasegawa, Satoshi Tsutsumi, Hiroki Matsutani, Vasutan Tunbunheng, Adepu Parimala, Takashi Nishimura, Masaru Kato, Shotaro Saito, Toru Sano, Naomi Seki, Keiichiro Hirai, Mao KaiYi, Hideharu Amano (Keio Univ.)
 [more] VLD2006-101 CPSY2006-72 RECONF2006-72
pp.43-48
VLD, CPSY, RECONF, IPSJ-SLDM 2007-01-18
14:15
Tokyo Keio Univ. Hiyoshi Campus A Scheduling Algorithm for Multicast Configuration
Satoshi Tsutsumi, Vasutan Tunbunheng, Yohei Hasegawa, Hiroki Matsutani, Adepu Parimala, Takuro Nakamura, Takashi Nishimura, Toru Sano, Masaru Kato, Shotaro Saito, Naomi Seki, Keiichiro Hirai, Mao KaiYi, Hideharu Amano (Keio Univ.)
 [more] VLD2006-102 CPSY2006-73 RECONF2006-73
pp.49-54
 Results 1 - 8 of 8  /   
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