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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| DC | 2013-02-13 13:30 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Characteristic Analysis of Signal Delay for Resistive Open Fault Detection Hiroto Ohguri, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Yoshinobu Higami, Hiroshi Takahashi (Ehime Univ.)  DC2012-84 |
When a resistive open fault occurs, signal delay at the faulty wire may degrade circuit performance. However, a resistiv... [more] | DC2012-84 pp.25-30 |
| DC | 2013-02-13 13:55 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | On Fault detection method considering adjacent TSVs for a delay fault in TSV Masanori Nakamura, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ.of Tokushima) DC2012-85 |
We propose a fault detection method for a TSV (through-Silicon via) considering adjacent TSVs for detecting delay caused... [more] | DC2012-85 pp.31-36 |
| DC | 2012-06-22 14:20 |
Tokyo | Room B3-1 Kikai-Shinko-Kaikan Bldg | [Invited Talk]
Empirical study for signal integrity-defects Hiroshi Takahashi, Yoshinobu Higami (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. Tokushima) DC2012-12 |
We try to empirically study signal integrity-defects. In this study, we analyze the resistive open fault that causes th... [more] |
DC2012-12 pp.21-26 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-29 10:15 |
Miyazaki | NewWelCity Miyazaki | A BIST-Aided Scan Test using Shifting Inverter Code and a TPG Method for Test Data Reduction Yasuhiko Okada, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) VLD2011-74 DC2011-50 |
BIST-aided scan test (BAST) has been proposed as one of the techniques that enhance scan-based BIST.The BAST architectur... [more] | VLD2011-74 DC2011-50 pp.133-138 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2011-11-30 10:30 |
Miyazaki | NewWelCity Miyazaki | On the design for testability method using Time to Digital Converter for detecting delay faults Hiroyuki Makimoto, Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) VLD2011-84 DC2011-60 |
We propose the design for testability method for detecting delay fault that can form a TDC(Time-to-Digital Converter) to... [more] | VLD2011-84 DC2011-60 pp.185-190 |
| DC | 2010-02-15 10:25 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Modeling resistive open faults and generating their tests Hiroshi Takahashi, Yoshinobu Higami, Yuta Shudo, Yuji Takamune, Yuzo Takamatsu (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) DC2009-68 |
In order to solve the problem of signal integrity, we propose an extended delay fault model for modeling a resistive ope... [more] | DC2009-68 pp.19-24 |
| DC | 2010-02-15 16:05 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Consideration of Open Faults Model Based on Digital Measurement of TEG Chip Toshiyuki Tsutsumi (Meiji Univ.), Yasuyuki Kariya, Koji Yamazaki (Meiji Univ), Masaki Hashizume, Hiroyuki Yotsuyanagi (Tokushima Univ), Hiroshi Takahashi, Yoshinobu Higami, Yuzo Takamatsu (Ehime Univ) DC2009-77 |
Countermeasures against an open fault in LSI testing become more important with advancement of LSI process technology. ... [more] | DC2009-77 pp.75-80 |
| DC | 2009-02-16 14:15 |
Tokyo | On Tests to Detect Open faults with Considering Adjacent Lines Tetsuya Watanabe, Hiroshi Takahashi, Yoshinobu Higami (Ehime Univ.), Toshiyuki Tsutsumi, Koji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ, Tokushima), Yuzo Takamatsu (Ehime Univ.) DC2008-74 |
In modern manufacturing technologies with the shrinking of manufacturing process, LSIs may have several metal interconne... [more] | DC2008-74 pp.37-42 |
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| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2008-11-17 14:15 |
Fukuoka | Kitakyushu Science and Research Park | Analysis of Open Fault using TEG Chip Toshiyuki Tsutsumi, Yasuyuki Kariya, Koji Yamazaki (Meiji Univ), Masaki Hashizume, Hiroyuki Yotsuyanagi (Tokushima Univ), Hiroshi Takahashi, Yoshinobu Higami, Yuzo Takamatsu (Ehime Univ) VLD2008-63 DC2008-31 |
The high integration of the semiconductor technology advances, and the fault detection and the failure diagnosis of LSI ... [more] | VLD2008-63 DC2008-31 pp.19-24 |
| DC | 2008-06-20 15:50 |
Tokyo | Kikai-Shinko-Kaikan Bldg | Improving the Diagnostic Quality of Open Faults Koji Yamazaki, Toshiyuki Tsutsumi (Meiji Univ.), Hiroshi Takahashi, Yoshinobu Higami, Takashi Aikyo (Ehime Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Tokushima Univ.), Yuzo Takamatsu (Ehime Univ.) DC2008-16 |
With the shrinking process technologies and the use of copper process, open defects on interconnect wires, contacts and ... [more] | DC2008-16 pp.29-34 |
| DC | 2008-02-08 09:25 |
Tokyo | Kikai-Shinko-Kaikan Bldg. | Fault Diagnosis for Dyinamic Open Faults with Considering Adjacent Lines Hiroshi Takahashi, Yoshinobu Higami, Takashi Aikyo, Syuhei Kadoyama, Tetsuya Watanabe, Yuzo Takamatsu (Ehime Univ.), Toshiyuki Tsutsumi, Kouji Yamazaki (Meiji Univ.), Hiroyuki Yotsuyanagi, Masaki Hashizume (Univ. of Tokushima) DC2007-68 |
In modern manufacturing technologies with the shrinking of manufacturing process, LSIs may have several metal interconne... [more] | DC2007-68 pp.7-12 |
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