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 Results 21 - 30 of 30 [Previous]  /   
Committee Date Time Place Paper Title / Authors Abstract Paper #
SDM, ICD, ITE-IST [detail] 2017-08-01
09:45		 Hokkaido Hokkaido-Univ. Multimedia Education Bldg. Parallel Programming of Non-volatile Power-up States of SRAM
Tomoko Mizutani, Kiyoshi Takeuchi, Takuya Saraya (Univ. of Tokyo), Hirofumi Shinohara (Waseda Univ.), Masaharu Kobayashi, Toshiro Hiramoto (Univ. of Tokyo) SDM2017-38 ICD2017-26		 A technique for using an ordinary SRAM array for programmable and readable non-volatile (NV) memory is proposed. Paralle... [more] SDM2017-38 ICD2017-26
pp.49-54
SDM 2017-01-30
11:00		 Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Experimental Study on Polarization-Limited Operation Speed of Negative Capacitance FET with Ferroelectric HfO2
Masaharu Kobayashi, , , (Univ. of Tokyo) SDM2016-132		  [more] SDM2016-132
pp.9-12
ICD, CPM, ED, EID, EMD, MRIS, OME, SCE, SDM, QIT
(Joint) [detail]		 2017-01-31
10:55		 Hiroshima Miyajima-Morino-Yado(Hiroshima) [Invited Talk] Experimental Study on Operation Speed of Negative Capacitance FET with Ferroelectric HfO2
Masaharu Kobayashi, Nozomu Ueyama, Kyungmin Jang, Toshiro Hiramoto (IIS, Univ. of Tokyo) EMD2016-79 MR2016-51 SCE2016-57 EID2016-58 ED2016-122 CPM2016-123 SDM2016-122 ICD2016-110 OME2016-91		  [more] EMD2016-79 MR2016-51 SCE2016-57 EID2016-58 ED2016-122 CPM2016-123 SDM2016-122 ICD2016-110 OME2016-91
pp.51-54
VLD, DC, CPSY, RECONF, CPM, ICD, IE
(Joint) [detail]		 2016-11-29
10:30		 Osaka Ritsumeikan University, Osaka Ibaraki Campus [Invited Talk] Development of Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel Signal Processors by Using Direct Bonding of SOI Layers
Masahide Goto, Yuki Honda, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi (NHK), Takuya Saraya, Masaharu Kobayashi, Eiji Higurasgi, Hiroshi Toshiyoshi, Toshiro Hiramoto (Univ. Tokyo) CPM2016-79 ICD2016-40 IE2016-74		  [more] CPM2016-79 ICD2016-40 IE2016-74
pp.17-21
ICD, SDM, ITE-IST [detail] 2016-08-03
15:05		 Osaka Central Electric Club Increased Drain-Induced Variability and Within-Device Variability in Extremely Narrow Silicon Nanowire MOSFETs with Width down to 2nm
Tomoko Mizutani, Kiyoshi Takeuchi, Ryota Suzuki, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto (Univ. of Tokyo) SDM2016-67 ICD2016-35		 The effects of drain voltage in threshold voltage variability in extremely narrow silicon nanowire (NW) channel FETs are... [more] SDM2016-67 ICD2016-35
pp.123-126
ICD, SDM, ITE-IST [detail] 2016-08-03
15:30		 Osaka Central Electric Club Performance Enhancement of Tunnel FET by Negative Capacitance
Masaharu Kobayashi, Kyungmin Jang, Nozomu Ueyama, Toshiro Hiramoto (Univ. of Tokyo) SDM2016-68 ICD2016-36		 IoT devices in a sensor network require a new energy-efficient transistor which operates at ultralow voltage and power e... [more] SDM2016-68 ICD2016-36
pp.127-130
SDM, ICD 2015-08-24
11:45		 Kumamoto Kumamoto City [Invited Talk] Device Design Guideline for negative capacitance FET (NCFET)
Masaharu Kobayashi, Toshiro Hiramoto (The Univ. of Tokyo) SDM2015-60 ICD2015-29		  [more] SDM2015-60 ICD2015-29
pp.15-18
SDM, ICD 2015-08-25
10:55		 Kumamoto Kumamoto City [Invited Talk] Novel Single p+Poly-Si/Hf/SiON Gate Stack Technology on Silicon-on-Thin-Buried-Oxide (SOTB) for Ultra-Low Leakage Applications
Yoshiki Yamamoto, Hideki Makiyama, Tomohiro Yamashita, Hidekazu Oda, Shiro Kamohara, Yasuo Yamaguchi (Renesas Electronics Corp.), Nobuyuki Sugii (Hitachi), Tomoko Mizutani, Masaharu Kobayashi, Toshiro Hiramoto (UT) SDM2015-67 ICD2015-36		 We demonstrate a cost effective 65-nm SOTB CMOS technology for ultra-low leakage applications. Novel single p+poly-Si/Hf... [more] SDM2015-67 ICD2015-36
pp.53-57
SDM, ICD 2015-08-25
11:45		 Kumamoto Kumamoto City Threshold Voltage and Current Variability of Extremely Narrow Silicon Nanowire MOSFETs with Width down to 2nm
Tomoko Mizutani, Yuma Tanahashi, Ryota Suzuki, Takuya Saraya, Masaharu Kobayashi, Toshiro Hiramoto (Univ. of Tokyo) SDM2015-68 ICD2015-37		  [more] SDM2015-68 ICD2015-37
pp.59-62
SDM 2015-01-27
14:25		 Tokyo Kikai-Shinko-Kaikan Bldg. [Invited Talk] Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel A/D Converters Fabricated by Direct Bonding of SOI Layers
Masahide Goto, Kei Hagiwara, Yoshinori Iguchi, Hiroshi Ohtake (NHK), Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto (The Univ. of Tokyo) SDM2014-141		 We report the first demonstration of three-dimensional (3D) integrated CMOS image sensors with pixel-parallel A/D conver... [more] SDM2014-141
pp.25-28
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