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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD | 2024-04-11 14:30 |
Kanagawa | (Primary: On-site, Secondary: Online) |
[Invited Lecture]
A 40 nm 2 kb MTJ-Based Non-Volatile SRAM Macro with Novel Data-Aware Store Architecture for Normally Off Computing Kenta Suzuki, Keizo Hiraga, Bessho Kazuhiro (Sony), Kimiyoshi Usami (SIT), Taku Umebayashi (Sony)  ICD2024-7 |
(To be available after the conference date) [more] | ICD2024-7 pp.20-23 |
| RECONF, VLD | 2024-01-29 17:00 |
Kanagawa | AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
Derivation of an Evaluation Chip Spec suitable for Tester and Data Analysis
-- Toward comparative evaluation of latch-based and flip-flop-based circuits -- Tadaaki Tanimoto, Keizo Hiraga, Toshihiko Katou, Kazuhiro Bessho, Toshimasa Shimizu (Sony Semiconductor Solutions) VLD2023-90 RECONF2023-93 |
As a synchronous logic circuit, it is often argued that latch-based circuits are superior to flip-flop circuits in terms... [more] | VLD2023-90 RECONF2023-93 pp.59-64 |
| RECONF, VLD | 2024-01-29 17:25 |
Kanagawa | AIRBIC Meeting Room 1-4 (Primary: On-site, Secondary: Online) |
Comparison of latch-based circuit and flip-flop-based circuit in actual device Kenji Takahashi, Tadaaki Tanimoto, Keizo Hiraga, Masayuki Hayashi, Takato Inoue, Kazuhiro Bessho, Toshimasa Shimizu (Sony Semiconductor Solutions) VLD2023-91 RECONF2023-94 |
The comparison results of current consumption, maximum operating frequency (Fmax) characteristics and minimum operating ... [more] | VLD2023-91 RECONF2023-94 pp.65-70 |
| VLD, DC, RECONF, ICD, IPSJ-SLDM (Joint) [detail] |
2021-12-01 10:35 |
Online | Online | Energy saving in a multi-context coarse grained reconfigurable array with non-volatile flip-flops Aika Kamei, Takuya Kojima, Hideharu Amano (Keio Univ.), Daiki Yokoyama, Hisato Miyauchi, Kimiyoshi Usami (SIT), Keizo Hiraga, Kenta Suzuki (SSS) VLD2021-20 ICD2021-30 DC2021-26 RECONF2021-28 |
IoT and edge-computing have been attracting much attention and demands for power efficiency as well as high performance ... [more] | VLD2021-20 ICD2021-30 DC2021-26 RECONF2021-28 pp.19-24 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC [detail] | 2021-03-26 14:40 |
Online | Online | Non Stop Processor with Non Volatile Element Shota Nakabeppu, Nao Sugiyama, Nobuyuki Yamasaki (Keio Univ.), Kenta Suzuki, Keizo Hiraga, Yasuo Kanda (Sony Semiconductor Solutions) CPSY2020-66 DC2020-96 |
In recent years, embedded systems such as wearable devices and robots have become widespread. Wear- able devices often ... [more] |
CPSY2020-66 DC2020-96 pp.97-102 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2018-08-01 18:30 |
Kumamoto | Kumamoto City International Center | Takeharu Ikezoe, Hideharu Amano (Keio Univ.), Junya Akaike, Kimiyoshi Usami, Masaru Kudo (SIT), Keizo Hiraga, Yusuke Shuto, Kojiro Yagami (Sony SS) CPSY2018-32 |
[more] | CPSY2018-32 pp.229-234 |
| VLD, HWS (Joint) |
2018-03-02 10:30 |
Okinawa | Okinawa Seinen Kaikan | Implementation of Reconfigurable Accelerator Cool Mega-Array Using MTJ-based Nonvolatile Flip-Flop Enabling to Verify Stored Data Junya Akaike, Kimiyoshi Usami, Masaru Kudo (SIT), Hideharu Amano, Takeharu Ikezoe (Keio Univ.), Keizo Hiraga, Yusuke Shuto, Kojiro Yagami (Sony SS) VLD2017-122 |
As a method of reducing the power consumption of the flip-flop circuit, there is a nonvolatile flip-flop (NVFF) that ena... [more] | VLD2017-122 pp.199-204 |
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