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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| VLD, HWS (Joint) |
2018-03-02 14:05 |
Okinawa | Okinawa Seinen Kaikan | PL-PUF Implementation by Improvement of Capturing Timing Control Circuit Yasuhiro Ogasahara, Yohei Hori, Hanpei Koike (AIST)  VLD2017-126 |
In this study, we demonstrate the first implementation of a pseudo linear feedback shift register physical unclonable fu... [more] | VLD2017-126 pp.225-229 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2017-11-06 14:30 |
Kumamoto | Kumamoto-Kenminkouryukan Parea | Reduction of Overhead in Adaptive Body Bias Technology due to Triple-well Structure Yasuhiro Ogasahara, Toshihiro Sekigawa, Hanpei Koike (AIST) VLD2017-32 DC2017-38 |
[more] | VLD2017-32 DC2017-38 pp.31-35 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 11:20 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Preliminary experimental platform for FlexPower FPGA evaluation Toshihiro Katashita, Masakazu Hioki, Yohei Hori, Hanpei Koike (AIST) RECONF2016-47 |
[more] | RECONF2016-47 pp.41-46 |
| VLD, DC, CPSY, RECONF, CPM, ICD, IE (Joint) [detail] |
2016-11-29 09:00 |
Osaka | Ritsumeikan University, Osaka Ibaraki Campus | Measurement of Vth Variation due to STI Stress and Inverse Narrow Channel Effect at Ultra-Low Voltage in a Variability-Suppressed Process Yasuhiro Ogasahara, Hanpei Koike (AIST) CPM2016-76 ICD2016-37 IE2016-71 |
This paper demonstrates notable impact of Vth shift due to STI-induced dopant redistribution on ultra-low voltage design... [more] | CPM2016-76 ICD2016-37 IE2016-71 pp.1-6 |
| ICD, SDM, ITE-IST [detail] | 2016-08-03 09:00 |
Osaka | Central Electric Club | [Invited Talk]
SRAM PUF using Polycrystalline Silicon Channel FinFET and Its Evaluation Shin-ichi O'uchi, Yungxun Liu, Yohei Hori, Toshifumi Irisawa, Hiroshi Fuketa, Yukinori Morita, Shinji Migita, Takahiro Mori, Tadashi Nakagawa, Junichi Tsukada, Hanpei Koike, Meishoku Masahara, Takashi Matsukawa (AIST) SDM2016-60 ICD2016-28 |
[more] | SDM2016-60 ICD2016-28 pp.83-87 |
| RECONF | 2015-06-19 11:35 |
Kyoto | Kyoto University | Evaluation of the third Flex Power FPGA chip in SOTB technology Masakazu Hioki, Yasuhiro Ogasahara, Hanpei Koike (AIST) RECONF2015-3 |
This paper reports the evaluation of the third Flex Power FPGA chip in SOTB technology. Fabricated chip aims to shrink a... [more] | RECONF2015-3 pp.13-16 |
| RECONF | 2015-06-20 14:00 |
Kyoto | Kyoto University | On the Evaluation Board AISTino equipped with the Fourth Flex Power FPGA chip with SOTB transistors Hanpei Koike, Masakazu Hioki, Yasuhiro Ogasahara (AIST), Hayato Ishigaki, Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa (AIST) RECONF2015-22 |
Flex Power FPGA utilizes threshold voltage programmability to reduce its static power by the body bias control of circui... [more] | RECONF2015-22 pp.119-124 |
| RECONF | 2014-09-18 17:20 |
Hiroshima | On The Second Flex Power FPGA Chip with SOTB Transistors Hanpei Koike (AIST), Chao Ma (Meiji Univ.), Masakazu Hioki, Yasuhiro Ogasahara (AIST), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa (AIST) RECONF2014-24 |
[more] | RECONF2014-24 pp.41-46 |
|
| RECONF | 2014-06-12 10:25 |
Miyagi | Katahira Sakura Hall | Improvement of Implementability by Exploring Routing Architecture in Flex Power FPGA Masakazu Hioki, Toshihiro Sekigawa, Tadashi Nakagawa, Yasuhiro Ogasahara (AIST), Toshiyuki Tsutsumi (Meiji Univ.), Hanpei Koike (AIST) RECONF2014-5 |
(To be available after the conference date) [more] | RECONF2014-5 pp.21-25 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2013-11-28 13:45 |
Kagoshima | Evaluation of The First Flex Power FPGA chip with SOTB transistors Chao Ma (AIST/Meiji Univ.), Masakazu Hioki (AIST), Takashi Kawanami (KIT), Yasuhiro Ogasahara, Tadashi Nakagawa, Toshihiro Sekigawa (AIST), Toshiyuki Tsutsumi (AIST/Meiji Univ.), Hanpei Koike (AIST) RECONF2013-53 |
Flex Power FPGA was able to utilize a programmable threshold voltage to each circuit block of the FPGA by using the body... [more] | RECONF2013-53 pp.77-82 |
|
| ICD, ITE-IST | 2013-07-05 16:50 |
Hokkaido | San Refre Hakodate | A Study on 1/f Noise Characteristic in Independent-Double-Gate-FinFET Hideo Sakai (Keio Univ.), Shin-ichi O'uchi, Kazuhiko Endo, Takashi Matsukawa, Yongxun Liu, Yuki Ishikawa, Junichi Tsukada, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Meishoku Masahara (AIST), Hiroki Ishikuro (Keio Univ.) ICD2013-43 |
In this work, we measured 1/f noise of Independent-Double-Gate- (IDG-) FinFET which has two independent gates. Flicker n... [more] | ICD2013-43 pp.119-124 |
| RECONF | 2012-05-29 11:00 |
Okinawa | Tiruru (Naha Okinawa, Japan) | Development of a demonstration system for Ultra-low-power FPGA with Fine-Grained Field-Programmable Threshold Voltage Control Takashi Kawanami (KIT), Masakazu Hioki (AIST), Yohei Matsumoto (Kaiyo Univ.), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST) RECONF2012-5 |
The Flex Power FPGA is a new FPGA architecture which enabled high speed operation and low power-consumption by fine-grai... [more] | RECONF2012-5 pp.25-30 |
| SDM | 2011-10-21 15:50 |
Miyagi | Tohoku Univ. (Niche) | Performance Evaluation of 3D FPGA using Through Silicon Via Naoto Miyamoto (Tohoku Univ.), Yohei Matsumoto (Tokyo Univ. of Marine Science and Technology), Hanpei Koike (AIST), Tadayuki Matsumura, Kenichi Osada, Yahoko Nakagawa (ASET), Tadahiro Ohmi (Tohoku Univ.) SDM2011-113 |
3D LSI fabrication is a promising technology as a representative of “More Than Moore” stream. 3D FPGA is one of the kill... [more] | SDM2011-113 pp.91-96 |
| ICD | 2011-04-19 10:55 |
Hyogo | Kobe University Takigawa Memorial Hall | 0.5-V FinFET SRAM Using Dynamic-Threshold-Voltage Pass Gates Shin-ichi O'uchi, Kazuhiko Endo, Yongxun Liu, Takashi Matsukawa, Tadashi Nakagawa, Yuki Ishikawa, Junichi Tsukada, Hiromi Yamauchi, Toshihiro Sekigawa, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara (AIST) ICD2011-11 |
This article presents a FinFET SRAM which salvages malfunctioned bits caused by random variation. In the presenting SRAM... [more] | ICD2011-11 pp.59-63 |
| SDM, ED | 2011-02-23 16:30 |
Hokkaido | Hokkaido Univ. | A Study on Precise FinFET High Frequency Characteristic Evaluation Method Hideo Sakai (Keio Univ.), Shinichi Ouchi, Takashi Matsukawa, Kazuhiko Endo, Yongxun Liu, Junichi Tsukada, Yuki Ishikawa, Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike, Kunihiro Sakamoto, Meishoku Masahara (AIST), Hiroki Ishikuro (Keio Univ.) ED2010-198 SDM2010-233 |
In recent years, different research groups have been focusing on FinFET transistor research as an excellent replacement ... [more] | ED2010-198 SDM2010-233 pp.37-42 |
| ICD, IPSJ-ARC | 2011-01-20 11:00 |
Kanagawa | Keio University (Hiyoshi Campus) | Performance Evaluation of 3D FPGA with Homogeneous Tileable Structure Naoto Miyamoto (Tohoku Univ.), Hanpei Koike (AIST), Yohei Matsumoto (Kaiyo Univ.), Tadayuki Matsumura, Kenichi Osada, Yahoko Nakagawa, Keisuke Toyama (ASET), Tadahiro Ohmi (Tohoku Univ.) |
3D LSI fabrication is a promising technology as a representative of "More Than Moore" stream. 3D FPGA is one of the kill... [more] | ICD2010-130 pp.13-18 |
| ICD, IPSJ-ARC | 2011-01-20 16:20 |
Kanagawa | Keio University (Hiyoshi Campus) | [Panel Discussion]
Will 3D-ICs Become Mainstream ? Koji Inoue (Kyushu Univ.), Nobuaki Miyakawa (HRI), Kazuya Okamoto (Osaka Univ.), Ken Takeuchi (Univ. of Tokyo), Hanpei Koike (AIST) |
[more] | ICD2010-133 p.37 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2010-12-01 09:50 |
Fukuoka | Kyushu University | Fabrication in Low Power Process and Evaluation of Power Reconfigurable Field Programmable Gate Array Masakazu Hioki (AIST), Takashi Kawanami (KIT), Yohei Matsumoto (TUMSAT), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST) RECONF2010-45 |
Flex Power FPGA that is FPGA with power reconfigurability aims at the reduction of static power. The reduction of off cu... [more] | RECONF2010-45 pp.37-42 |
| RECONF | 2009-09-17 15:40 |
Tochigi | Utsunomiya Univ. | Design and Fabrication of Flex Power FPGA with Power Reconfigurability Masakazu Hioki (AIST), Takashi Kawanami (Kanazawa Inst. of Tech.), Yohei Matsumoto (AIST), Toshiyuki Tsutsumi (Meiji Univ.), Tadashi Nakagawa, Toshihiro Sekigawa, Hanpei Koike (AIST) RECONF2009-25 |
Our research group has evaluated “Flex Power FPGA” which can reconfigure the power from the viewpoint of software and ha... [more] | RECONF2009-25 pp.37-42 |
| RECONF, CPSY, VLD, IPSJ-SLDM | 2008-01-16 10:15 |
Kanagawa | Hiyoshi Campus, Keio University | [Invited Talk]
Flex Power FPGA Hanpei Koike (AIST) |
We have investigated Flex Power FPGA, in which fine-grain reconfigurable threshold voltage control enables substantial r... [more] | VLD2007-105 CPSY2007-48 RECONF2007-51 pp.1-6 |
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