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Committee Date Time Place Paper Title / Authors Abstract Paper #
VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM
(Joint) [detail]		 2014-11-28
10:05		 Oita B-ConPlaza A Test Point Insertion Method to Reduce Capture Power Dissipation
Yoshiyasu Takahashi, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyoto Sangyo Univ.) VLD2014-99 DC2014-53		 In at-speed scan testing of deep sub-micron era, high power dissipation can occur by high launch-induced switching activ... [more] VLD2014-99 DC2014-53
pp.185-190
DC 2014-02-10
10:55		 Tokyo Kikai-Shinko-Kaikan Bldg. A Low Power Dissipation Oriented Don't Care Filling Method Using SAT
Yoshiyasu Takahashi, Hiroshi Yamazaki, Toshinori Hosokawa (Nihon Univ.), Masayoshi Yoshimura (Kyushu Univ) DC2013-83		 High power dissipation can occur by high launch-induced switching activity when the response to a test pattern is captur... [more] DC2013-83
pp.25-30
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