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All Technical Committee Conferences (Searched in: All Years)
| Committee | Date Time | Place | Paper Title / Authors | Abstract | Paper # | |
| ICD, CPSY | 2016-12-15 15:30 |
Tokyo | Tokyo Institute of Technology |  ICD2016-57 CPSY2016-63 |
(To be available after the conference date) [more] | ICD2016-57 CPSY2016-63 p.33 |
| ICD, CPSY | 2016-12-15 15:30 |
Tokyo | Tokyo Institute of Technology | [Poster Presentation]
Kazutoshi Hirose, Shinya Takamaeda, Masayuki Ikebe, Testuya Asai, Masato Motomura (Hokkaido Univ.) ICD2016-58 CPSY2016-64 |
(To be available after the conference date) [more] | ICD2016-58 CPSY2016-64 p.35 |
| ICD, CPSY | 2016-12-15 15:30 |
Tokyo | Tokyo Institute of Technology | [Poster Presentation]
Itaru Hida, Shinya Takamaeda, Masayuki Ikebe, Masato Motomura, Tetsuya Asai (Hokkaido Univ.) ICD2016-60 CPSY2016-66 |
In this paper, we propose a Bayesian branch prediction circuit consisting of an instruction-feature extractor and a naiv... [more] | ICD2016-60 CPSY2016-66 p.39 |
| ICD, CPSY | 2016-12-15 15:30 |
Tokyo | Tokyo Institute of Technology | [Poster Presentation]
A nonlinear image-prosessing algorithm generating edge-guided textures and its FPGA implementation Aoi Tanibata, Miho Ushida, Shinya Takamaeda, Masayuki Ikebe, Masato Motomura, Tetsuya Asai (Hokkaido Univ.) ICD2016-61 CPSY2016-67 |
[more] | ICD2016-61 CPSY2016-67 p.41 |
| ICD, CPSY | 2016-12-15 15:30 |
Tokyo | Tokyo Institute of Technology | [Poster Presentation]
Effective hardware implementation of adaptive local-global tone mapping Takayuki Yoshida, Msayuki Ikebe, Takeshi Shimada, Shinya Takamaeda, Tetuya Asai, Masato Motomura (Hokkaido Univ.) ICD2016-79 CPSY2016-85 |
[more] | ICD2016-79 CPSY2016-85 pp.85-86 |
| ICD, CPSY | 2016-12-15 15:30 |
Tokyo | Tokyo Institute of Technology | [Poster Presentation]
Characteristics and circuit applications of local moving average curves Takeshi Shimada, Masayuki Ikebe, Yuhan Fu, Shinya Takamaeda, Tetsuya Asai, Masato Motomura (Hokkaido Univ.) ICD2016-82 CPSY2016-88 |
(To be available after the conference date) [more] | ICD2016-82 CPSY2016-88 p.91 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2016-08-09 16:45 |
Nagano | Kissei-Bunka-Hall (Matsumoto) | Hisakazu Fukuoka, Ryusuke Yamano, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2016-26 |
(To be available after the conference date) [more] | CPSY2016-26 pp.181-186 |
| CPSY, DC, IPSJ-ARC (Joint) [detail] |
2016-08-10 15:45 |
Nagano | Kissei-Bunka-Hall (Matsumoto) | CPSY2016-35 |
(To be available after the conference date) [more] | CPSY2016-35 pp.257-262 |
| RECONF | 2016-05-19 16:15 |
Kanagawa | FUJITSU LAB. | Checkpointing and Live-Migration on FPGA-based Supercomputing Shinya Takamaeda, Vu Hoang Gia, Supasit Kajkamhaeng (NAIST) RECONF2016-13 |
(To be available after the conference date) [more] | RECONF2016-13 pp.61-66 |
| CPSY, DC, IPSJ-SLDM, IPSJ-EMB, IPSJ-ARC (Joint) [detail] |
2016-03-25 14:55 |
Nagasaki | Fukue Bunka Hall/Rodou Fukushi Center | A Study of the Dynamic Power Estimate Method for FPGA Accelerator Keisuke Fujimoto, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-156 DC2015-110 |
Power consumption estimation is essential for the FPGA accelerator-used high-performance computer system. However, the d... [more] | CPSY2015-156 DC2015-110 pp.259-264 |
| VLD | 2016-02-29 15:25 |
Okinawa | Okinawa Seinen Kaikan | A Multi-Paradigm High-Level Hardware Design Environment Shinya Takamaeda (NAIST) VLD2015-115 |
(To be available after the conference date) [more] | VLD2015-115 pp.25-30 |
| NS, RCS (Joint) |
2015-12-18 11:25 |
Ehime | Matsuyama Community Center | BER/PER Simulation on Fractional bit width and Circuit Design of FFT for IEEE802.11ah Soichiro Kanagawa (NAIST), Nguyen Dang Hai (DUT), Hong Thi Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) RCS2015-258 |
In recent years, the concept of IoT has attracted attention. It utilize the data obtained by connecting the things to th... [more] | RCS2015-258 pp.87-92 |
| NS, RCS (Joint) |
2015-12-18 11:50 |
Ehime | Matsuyama Community Center | BER/PER Performance of 802.11ah K-best Viterbi Decoder on Fading Channel Duc Phuc Nguyen, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) RCS2015-259 |
IEEE 802.11ah shows promise advantages in Internet of Things (IoT) such as extended range, power efficiency and scalable... [more] | RCS2015-259 pp.93-98 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 11:40 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | Performance Comparison of FPGA Accelerators with Vivado HLS and PyCoRAM Yuma Kikutani (OPUCT), Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-66 |
High-level synthesis (HLS) technology has been an attractive and efficient method for FPGA system development. In this ... [more] | CPSY2015-66 pp.27-32 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 12:05 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | A proposal of the light field image compression and decompression using HEVC Takamasa Mitani, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-67 |
A light field image is a type of images that can refocus and extend the depth of field by post processing. A light field... [more] | CPSY2015-67 pp.33-38 |
| VLD, DC, IPSJ-SLDM, CPSY, RECONF, ICD, CPM (Joint) [detail] |
2015-12-02 14:35 |
Nagasaki | Nagasaki Kinro Fukushi Kaikan | Performance Evaluation of K-best Viterbi Decoder for IoT Applications Thi Hong Tran (NAIST), Dwi Rahma Ariyani, Lina Alfaridah ZH (Andalas Univ.), Shinya Takamaeda-Yamazaki, Yasuhiko Nakashima (NAIST) CPSY2015-70 |
[more] | CPSY2015-70 pp.51-56 |
| CPSY, IPSJ-ARC | 2015-10-08 10:00 |
Chiba | Makuhari-messe | [Poster Presentation]
A System Employing OculusRift and Many-core Simulator for Visualizing Performance Bottlenecks Satoshi Shimaya, Hiromasa Kato, Tomoya Kameda, Keisuke Fujimoto, Shohei Takeuchi, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-46 |
According to the complicated internal structure of modern CPU, the cost for tuning software to get higher performance ha... [more] | CPSY2015-46 pp.5-6 |
| CPSY, IPSJ-ARC | 2015-10-08 10:00 |
Chiba | Makuhari-messe | [Poster Presentation]
Evaluation of a Low Power CGRA EMAX Embedded with Zynq Shohei Takeuchi, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) CPSY2015-51 |
We have been proposing EMAX (Energy-Aware Multimode Accelerator Extension) that is one of CGRAs and can employ maximum ... [more] |
CPSY2015-51 pp.39-41 |
| RECONF | 2015-09-18 13:00 |
Ehime | Ehime University | A High-level Hardware Design Environment in Python Shinya Takamaeda (NAIST) RECONF2015-36 |
In software development, on standard computers, there are numerous alternatives of programming languages. In contrast, t... [more] | RECONF2015-36 pp.21-26 |
| SIS, IPSJ-AVM | 2015-09-03 15:00 |
Osaka | Kansai Univ. | Performance Evaluation of 802.11a Viterbi Decoder for IoT Applications Hiromasa Kato, Tran Thi Hong, Shinya Takamaeda, Yasuhiko Nakashima (NAIST) SIS2015-22 |
This research is our first step on the purpose of developing low-complex Viterbi decoder for IoT applications. We evalua... [more] | SIS2015-22 pp.43-49 |
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